- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8701 > CY28353OXC-2T (Silicon Laboratories Inc)IC CLOCK DIFF/DRIVER PLL 28TSSOP PDF資料下載
參數(shù)資料
| 型號(hào)： | CY28353OXC-2T |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 1/9頁(yè) |
| 文件大小： | 0K |
| 描述： | IC CLOCK DIFF/DRIVER PLL 28TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:6 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | 時(shí)鐘 |
| 輸出： | 時(shí)鐘 |
| 頻率 - 最大： | 170MHz |
| 電源電壓： | 2.375 V ~ 2.625 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
Differential Clock Buffer/Driver
CY28353-2
.......................... Document #: 38-07372 Rev. *B Page 1 of 9
400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
www.silabs.com
Features
Phase-locked loop (PLL) clock distribution for double
data rate synchronous DRAM applications
Distributes one differential clock input to six differential
outputs
External feedback pins (FBINT, FBINC) are used to
synchronize the outputs to the clock input
Conforms to the DDRI specification
Spread Aware for electromagnetic interference (EMI)
reduction
28-pin SSOP package
Description
This PLL clock buffer is designed for 2.5 VDD and 2.5 AVDD
operation and differential data input and output levels.
This device is a zero delay buffer that distributes a differential
clock input pair (CLKINT, CLKINC) to six differential pairs of
clock outputs (CLKT[0:5], CLKC[0:5]) and one differential pair
feedback clock outputs (FBOUTT, FBOUTC). The clock
outputs are controlled by the input clocks (CLKINT, CLKINC)
and the feedback clocks (FBINT, FBINC).
The two-line serial bus can set each output clock pair
(CLKT[0:5], CLKC[0:5]) to the Hi-Z state. When AVDD is
grounded, the PLL is turned off and bypassed for test
purposes.
The PLL in this device uses the input clocks (CLKINT,
CLKINC) and the feedback clocks (FBINT, FBINC) to provide
high-performance, low-skew, low–jitter output differential
clocks.
Block Diagram
Pin Configuration
28 pin SSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND
CLKT5
FBINC
FBOUTT
CLKT3
CLKC3
GND
FBOUTC
FBINT
CLKC5
CLKC4
CLKT4
VDD
SDATA
CLKC0
VDD
CLKINT
AVDD
VDD
CLKT2
CLKC2
AGND
CLKINC
CLKT0
CLKT1
CLKC1
GND
SCLK
CY28353-
2
Serial
Interface
Logic
SDATA
SCLK
CLKT0
FBOUTT
FBOUTC
CLKC0
CLKT1
CLKC1
CLKT2
CLKC2
CLKC3
CLKT3
CLKC4
CLKT4
CLKC5
CLKT5
PLL
FBINC
FBINT
CLKINT
AVDD
CLKINC
10
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。