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參數(shù)資料
| 型號： | CY28341ZC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | Universal Single-Chip Clock Solution for VIA P4M266/KM266 DDR Systems |
| 中文描述： | 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56 |
| 封裝： | 6 X 14 MM, TSSOP2-56 |
| 文件頁數(shù)： | 1/21頁 |
| 文件大?。?/td> | 189K |
| 代理商： | CY28341ZC |
Universal Single-Chip Clock Solution for VIA P4M266/KM266
DDR Systems
CY28341
Cypress Semiconductor Corporation
Document #: 38-07367 Rev. *A
3901 North First Street
San Jose
CA 95134
Revised December 26, 2002
408-943-2600
Features
Supports VIA
P4M266/KM266 chipsets
Supports Pentium 4, Athlon processors
Supports two DDR DIMMS
Supports three SDRAMS DIMMS at 100 MHz
Provides:
—Two different programmable CPU clock pairs
—Six differential SDRAM DDR pairs
—Three low-skew/low-jitter AGP clocks
—Seven low-skew/low-jitter PCI clocks
—One 48M output for USB
—One programmable 24M or 48M for SIO
Dial-a-Frequency and Dial-a-dB
features
Spread Spectrum for best electromagnetic interference
(EMI) reduction
Watchdog feature for systems recovery
SMBus-compatible for programmability
56-pin SSOP and TSSOP packages
Table 1. Frequency Selection Table
Note:
1.
Pins marked with [*] have internal pull-up resistors. Pins marked with [**] have internal pull-down resistors.
FS(3:0)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1100
1111
CPU
66.80
100.00
120.00
133.33
72.00
105.00
160.00
140.00
77.00
110.00
180.00
150.00
90.00
100.00
200.00
133.33
AGP
66.80
66.80
60.00
66.67
72.00
70.00
64.00
70.00
77.00
73.33
60.00
60.00
60.00
66.67
66.67
66.67
PCI
33.40
33.40
30.00
33.33
36.00
35.00
32.00
35.00
38.50
36.67
30.00
30.00
30.00
33.33
33.33
33.33
Block Diagram
Pin Configuration
[
1
]
PLL1
S2D
CONVERT
SMBus
WD
CPUCS_T/C
VDDC
VDD
CPU01/CPU0D_T/C
SELP4_K7#
PCI(36)
PCI_F
FS1
REF(01)
VDDR
FS0
48M
24_48M
FBOUT
DDRT(05/SDRAM0246810
DDRC(05/SDRAM1357911
SCLK
SDATA
PD#
AGP(02
VDDAGP
VDD48M
VDDD
XTAL
XOUT
XIN
FS2
PCI2
PCI1
VDDPCI
PLL2
SRESET#
/2
Bu_IN
REF0
FS3
MULTSEL
SELSDR_DDR
WDEN
56 pin SSOP
VSSR
XIN
*FS0/REF0
XOUT
VDDAGP
AGP0
*SELP4_K7/AGP1
VSSAGP
**FS1/PCI_F
AGP2
**SELSDR_DDR/PCI1
*MULTSEL/PCI2
VSSPCI
PCI3
PCI4
VDDPCI
PCI5
PCI6
VSS48M
**FS3/48M
**FS2/24_48M
VDD48M
VDD
VSS
IREF
*PD#/SRESET#
SCLK
SDATA
VDDR
VSSC
CPUT/CPUOD_T
CPUC/CPUOD_C
VDDC
VDDI
CPUCS_C
VTTPWRGD#/REF1
CPUCS_T
VSSI
FBOUT
BUF_IN
DDRT0/SDRAM0
DDRC0/SDRAM1
DDRT1/SDRAM2
DDRC1/SDRAM3
VDDD
VSSD
DDRT2/SDRAM4
DDRC2/SDRAM5
DDRT3/SDRAM6
DDRC3/SDRAM7
VDDD
VSSD
DDRT4/SDRAM8
DDRC4/SDRAM9
DDRT5/SDRAM10
DDRC5/SDRAM11
C
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
1
2
3
4
5
6
7
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY28341ZC-2 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Chip for VIA⑩P4M/KT/KM400 DDR Systems |
| CY28341ZC-2T | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Chip for VIA⑩P4M/KT/KM400 DDR Systems |
| CY28341ZC-3 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Chip for VIA⑩P4M/KT/KM400A DDR Systems |
| CY28341ZC-3T | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Chip for VIA⑩P4M/KT/KM400A DDR Systems |
| CY28341ZCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Single-Chip Clock Solution for VIA P4M266/KM266 DDR Systems |
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