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參數(shù)資料
| 型號： | CY28331 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 3/17頁 |
| 文件大?。?/td> | 240K |
| 代理商： | CY28331 |
CY28312B-2
Document #: 38-07596 Rev. **
Page 3 of 17
Serial Data Interface
The CY28312B-2 features a two-pin, serial data interface that
can be used to configure internal register settings that control
particular device functions.
Data Protocol
The clock driver serial protocol supports byte/word write,
byte/word read, block write and block read operations from the
controller. For block write/read operation, the bytes must be
accessed in sequential order from lowest to highest byte with
the ability to stop after any complete byte has been trans-
ferred. For byte/word write and byte read operations, system
controller can access individual indexed byte. The offset of the
indexed byte is encoded in the command code.
The definition for the command code is defined in
Table 1.
SDATA
SCLK
VDD_CPU
31
30
40
I/O
I
P
Data pin for SMBus circuitry
.
Clock pin for SMBus circuitry
.
2.5V Power Connection
. Power supply for CPU output buffers. Connect to
2.5V.
3.3V Power Connection
. Power supply for AGP output buffers. Connect to 3.3V.
3.3V Power Connection
. Power supply for PCI output buffers. Connect to 3.3V.
3.3V Power Connection
. Power supply for 48-MHz output buffers. Connect to 3.3V.
3.3V Power Connection:
Power supply for reference output buffers. Connect
to 3.3V.
3.3V Power Connection:
Power supply for PLL core. Connect to 3.3V.
Ground Connections:
Connect all ground pins to the common system ground
plane.
VDDQ_AGP
VDDQ_PCI
VDDQ_48MHz
VDD_REF
25
P
P
P
P
15, 23
5
1
VDD_Core
GND_REF,
GND_48MHz,
GND_PCI,
GND_AGP,
GND_Core,
GND_CPU
33
P
G
2, 8, 29, 32, 37,
43
Pin Definitions
(continued)
Pin Name
Pin No.
Pin
Type
Pin Description
Bit
7
Descriptions
0 = Block read or block write operation
1 = Byte/Word read or byte/word write operation
Byte offset for byte/word read or write operation. For block read or write operations, these bits
need to be set at ‘0000000’.
6:0
Table 1. Block Read and Block Write Protocol
Block Write Protocol
Block Read Protocol
Bit
1
2:8
9
10
11:18
Description
Bit
1
2:8
9
10
11:18
Description
Start
Slave address – 7 bits
Write
Acknowledge from slave
Command Code – 8 bits
‘00000000’ stands for block operation
Acknowledge from slave
Byte Count – 8 bits
Acknowledge from slave
Data byte 0 – 8 bits
Acknowledge from slave
Data byte 1 – 8 bits
Acknowledge from slave
Start
Slave address – 7 bits
Write
Acknowledge from slave
Command Code – 8 bits
‘00000000’ stands for block operation
Acknowledge from slave
Repeat start
Slave address – 7 bits
Read
Acknowledge from slave
Byte count from slave – 8 bits
Acknowledge
19
19
20
20:27
28
29:36
37
38:45
46
21:27
28
29
30:37
38
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28331-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY28331OC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY28331OC-2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY28331OCT | 制造商:SPECTRALINEAR 制造商全稱:SPECTRALINEAR 功能描述:Clock Generator for AMD⑩ Hammer |
| CY28331OXC | 功能描述:IC CLOCK GEN AMD 48-SSOP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
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