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參數(shù)資料
| 型號(hào)： | CY26501 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時(shí)鐘和緩沖器 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 161K |
| 代理商： | CY26501 |
CY26501/CY26502
Document #: 38-07356 Rev. *A
Page 8 of 13
Table 11
represents stress ratings only, and functional operation at the maximums is not guaranteed.
Table 12
gives the nominal values of the external components and their maximum acceptable tolerance, assuming Z
CH
= 28
.
Note:
1.
Do not populate C
F
. Leave pads for future use.
Table 9. Distributed Loop Lock Time Specification
Parameter
Min.
Max.
t
DISTLOCK
Unit
ms
Description
5
Time from when Clk/ClkB output is settled to when the phase error between
SynclkN and PclkM falls within the t
ERR,PD
spec in
Table 14
.
Table 10. Supply and Reference Current Specification
Parameter
I
POWERDOWN
“
Supply
”
current in Power-down state (PwrDnB = 0)
I
CLKSTOP
“
Supply
”
current in Clk Stop state (StopB = 0)
I
NORMAL
“
Supply
”
current in Normal state (StopB = 1,PwrDnB = 1)
I
REF,PWDN
Current at V
DDIR
or V
DDIPD
reference pin in Power-down
state (PwrDnB = 0)
I
REF,NORM
Current at V
DDIR
or V
DDIPD
reference pin in Normal or Clk
Stop state (PwrDnB = 1)
Description
Min.
--
--
--
--
Max.
800
100
150
1
Unit
μA
mA
mA
μA
--
1.5
mA
Table 11. Absolute Maximum Ratings
Parameter
V
DD, ABS
V
I, ABS
Description
Min.
–
0.5
–
0.5
Max.
4.0
V
DD
+0.5
Unit
V
V
Max. voltage on V
DD
with respect to ground
Max. voltage on any pin with respect ground
Table 12. External Component Values
Parameter
Description
Test Load
47
47
Note 1
100 pF
Recommended
Value
39
51
Note 1
0.1
Tolerance
±5%
±5%
±10%
±20%
Unit
pF
μ
F
Parameter
R
S
R
P
C
F
C
MID
R
S
R
P
C
F
C
MID
Serial Resistor
Parallel Resistor
Edge Rate Filter Capacitor
AC Ground Capacitor
Figure 7. Example System Clock Driver Equivalent Circuit
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