參數(shù)資料
型號(hào): CY24239PVC
英文描述: CPU SYSTEM CLOCK GENERATOR|SSOP|56PIN|PLASTIC
中文描述: CPU系統(tǒng)時(shí)鐘發(fā)生器| SSOP封裝| 56PIN |塑料
文件頁(yè)數(shù): 4/15頁(yè)
文件大?。?/td> 150K
代理商: CY24239PVC
CY24239
Document #: 38-07038 Rev. **
Page 4 of 15
Spread Spectrum Frequency Timing Generator
The device generates a clock that is frequency modulated in
order to increase the bandwidth that it occupies. By increasing
the bandwidth of the fundamental and its harmonics, the am-
plitudes of the radiated electromagnetic emissions are re-
duced. This effect is depicted in
Figure 3
.
As shown in
Figure 3
, a harmonic of a modulated clock has a
much lower amplitude than that of an unmodulated signal. The
reduction in amplitude is dependent on the harmonic number
and the frequency deviation or spread. The equation for the
reduction is
dB = 6.5 + 9*log
10
(P) + 9*log
10
(F)
Where
P
is the percentage of deviation and
F
is the frequency
in MHz where the reduction is measured.
The output clock is modulated with a waveform depicted in
Figure 4
. This waveform, as discussed in
Spread Spectrum
Clock Generation for the Reduction of Radiated Emissions
by
Bush, Fessler, and Hardin, produces the maximum reduction
in the amplitude of radiated electromagnetic emissions. The
deviation selected for this chip is specified in
Table 6
.
Figure 4
details the Cypress spreading pattern. Cypress does offer op-
tions with more spread and greater EMI reduction. Contact
your local Sales representative for details on these devices.
Spread Spectrum clocking is activated or deactivated by se-
lecting the appropriate values for bits 1
0 in data byte 0 of the
SMBus data stream. Refer to
Table 7
for more details.
Figure 3. Clock Harmonic with and without SSCG Modulation Frequency Domain Representation
Spread
Spectrum
Enabled
EMI Reduction
Non-
Spectrum
Figure 4. Typical Modulation Profile
MAX
MIN
1
2
3
4
5
6
7
8
9
1
1
2
3
4
5
6
7
8
9
1
F
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