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參數(shù)資料
| 型號： | CY2318ANZOXC-11T |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs |
| 中文描述： | 2318 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48 |
| 封裝： | LEAD FREE, SSOP-48 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 184K |
| 代理商： | CY2318ANZOXC-11T |
18 Output, 3.3V SDRAM Buffer for
Desktop PCs with 4 DIMMs
CY2318ANZ
Cypress Semiconductor Corporation
Document #: 38-07181 Rev. *B
3901 North First Street
San Jose
,
CA 95134
408-943-2600
Revised January 19, 2005
Features
One input to 18 output buffer/driver
Supports up to four SDRAM DIMMs
Two additional outputs for feedback
Serial interface for individual output control
150ps typical output-output skew
Up to 100 MHz operation
Dedicated OE pin for testing
Space-saving 48-pin SSOP package
3.3V operation
Functional Description
The CY2318ANZ is a 3.3V buffer designed to distribute
high-speed clocks in PC applications. The part has 18 outputs,
16 of which can be used to drive up to four SDRAM DIMMs,
and the remaining can be used for external feedback to a PLL.
The device operates at 3.3V and outputs can run up to 100
MHz, thus making it compatible with Pentium II
processors.
The CY2318ANZ can be used in conjunction with the CY2280,
CY2281, CY2282 or similar clock synthesizer for a complete
Pentium II motherboard solution.
The CY2318ANZ also includes a serial interface which can
enable or disable each output clock. On power-up, all output
clocks are enabled (internal pull up). A separate Output
Enable pin facilitates testing on ATE.
Block Diagram
Serial Interface
Decoding
BUF_IN
SDATA
SCLOCK
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
SDRAM10
SDRAM11
SDRAM12
SDRAM13
SDRAM14
SDRAM15
SDRAM16
SDRAM17
1
2
3
4
5
6
7
NC
NC
V
DD
SDRAM15
SDRAM14
V
SS
V
SDRAM13
SDRAM12
V
SS
OE
V
DD
SDRAM11
SDRAM10
V
SS
V
DD
SDRAM9
SDRAM8
V
SS
V
DD
SDRAM17
V
SS
V
SCLOCK
SSOP
Top View
Pin Configuration
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC
NC
V
SDRAM0
SDRAM1
V
SS
V
DD
SDRAM2
SDRAM3
V
SS
BUF_IN
V
SDRAM4
SDRAM5
V
SS
V
SDRAM6
SDRAM7
V
SS
V
DD
SDRAM16
V
SS
V
DDIIC
SDATA
OE
相關PDF資料 |
PDF描述 |
|---|---|
| CY2318ANZPVC-11 | 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs |
| CY2318ANZPVC-11T | 18 Output, 3.3V SDRAM Buffer for Desktop PCs with 4 DIMMs |
| CY23EP05 | 2.5V or 3.3V, 10-220 MHz, Low Jitter, 5 Output Zero Delay Buffer(2.5V或3.3V,10-220 MHz,低抖動, 5輸出零延遲緩沖器) |
| CY23EP09 | 2.5V or 3.3V, 10-220 MHz, Low Jitter, 9-Output Zero Delay Buffer(2.5V或3.3V,10-220 MHz,低抖動, 9輸出零延遲緩沖器) |
| CY23FP12OXIT | 200-MHz Field Programmable Zero Delay Buffer |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY2318ANZPVC | 制造商:Cypress Semiconductor 功能描述: |
| CY2318ANZPVC11 | 制造商:Cypress Semiconductor 功能描述: |
| CY2318ANZPVC-11 | 功能描述:時鐘緩沖器 3.3V Buffer COM RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| CY2318ANZPVC-11T | 制造商:Cypress Semiconductor 功能描述:Clock Fanout Buffer 18-OUT 48-Pin SSOP T/R |
| CY2318ANZPVC-11TX | 制造商:Cypress Semiconductor 功能描述:18 OUTPUT, 3.3V SDRAM BUFFER FOR DESKTOP PCS WITH 4 DIMMS |
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