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參數(shù)資料
| 型號： | CY2302-01SC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | Frequency Multiplier and Zero Delay Buffer |
| 中文描述： | 2302 SERIES, PLL BASED CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8 |
| 封裝： | 0.150 INCH, SOIC-8 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 103K |
| 代理商： | CY2302-01SC |
Frequency Multiplier and Zero Delay Buffer
CY2302
Cypress Semiconductor Corporation
Document #: 38-07154 Rev. **
3901 North First Street
San Jose
CA 95134
Revised September 25, 2001
408-943-2600
2
Features
Two outputs
Configuration options allow various multiplications of
the reference frequency—refer to
Table 1
to determine
the specific option which meets your multiplication
needs
Available in 8-pin SOIC package
Key Specifications
Operating Voltage: ............................
3.3V ±5% or 5.0 ±10%
Operating Range: ......................10 MHz < f
OUT1
< 133 MHz
Absolute Jitter: ......................................................... ±500 ps
Output to Output Skew: ............................................. 250 ps
Propagation Delay: ................................................... ±350 ps
Propagation delay is affected by input rise time.
Table 1. Configuration Options
FBIN
OUT1
OUT1
OUT1
OUT1
OUT2
OUT2
OUT2
OUT2
FS0
0
1
0
1
0
1
0
1
FS1
0
0
1
1
0
0
1
1
OUT1
2 X REF
4 X REF
REF
8 X REF
4 X REF
8 X REF
2 X REF
16 X REF
OUT2
REF
2 X REF
REF/2
4 X REF
2 X REF
4 X REF
REF
8 X REF
Block Diagram
Pin Configuration
÷
Q
FS0
FS1
Reference
Input
FBIN
Phase
Detector
Charge
Pump
Loop
Filter
VCO
÷
2
Output
Buffer
OUT1
OUT2
Output
Buffer
External feedback connection to
OUT1 or OUT2, not both
IN
OUT2
VDD
OUT1
FS1
8
7
6
5
FBIN
IN
GND
FS0
1
2
3
4
SOIC
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2302-01SI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Frequency Multiplier and Zero Delay Buffer |
| CY23020-3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY23020LFI-1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY23020LFI-1T | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:20-output, 200-MHz Zero Delay Buffer |
| CY23020LFI-3 | 功能描述:鎖相環(huán) - PLL 400MHz IND Zero Delay Buffer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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