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參數(shù)資料
| 型號： | CXL5508P |
| 廠商： | Sony Corporation |
| 英文描述： | CMOS-CCD 1H Delay Line for PAL |
| 中文描述： | CMOS與CCD延遲線上半年為PAL制式 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 104K |
| 代理商： | CXL5508P |
CMOS-CCD 1H Delay Line for PAL
Description
The CXL5508M/P are CMOS-CCD delay line ICs
that provide 1H delay time for PAL signals, including
the external low-pass filter.
Features
Single 5V power supply
Low power consumption 60mW (Typ.)
Built-in peripheral circuits
Functions
565-bit CCD register
Clock driver
Auto-bias circuit
Input clamp circuit
Sample-and-hold circuit
Structure
CMOS-CCD
Absolute Maximum Ratings
(Ta = 25°C)
Supply voltage
Operating temperature Topr
Storage temperature
Allowable power dissipation
V
DD
6
V
–10 to +60
–55 to +150
°C
°C
Tstg
P
D
CXL5508M
CXL5508P
350
480
mW
mW
Recommended Operating Condition
(Ta = 25°C)
Supply voltage
V
DD
5 ± 5%
V
Recommended Clock Conditions
(Ta = 25°C)
Input clock amplitude
V
CLK
0.3 to 1.0
(0.5Vp-p typ.)
8.867238
Vp-p
Clock frequency
Input clock waveform
f
CLK
Sine wave
MHz
Input Signal Amplitude
V
SIG
500mVp-p (Typ.), 527mVp-p (Max.)
(at internal clamp condition)
– 1 –
E91101A7X-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXL5508M/P
Blook Diagram and Pin Configuration
(Top View)
(S/H 1bit)
C
1
2
3
O
4
5
7
8
CCD
(565bit)
6
V
V
D
A
V
S
V
I
Output circuit
Auto-bias circuit
Timing circuit
Bias circuit
Clock driver
Bias circuit (A)
Bias circuit (B)
Clamp circuit
CXL5508M
8 pin SOP (Plastic)
CXL5508P
8 pin DIP (Plastic)
相關PDF資料 |
PDF描述 |
|---|---|
| CXL5508M | CMOS-CCD 1H Delay Line for PAL |
| CXL5509M | CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5509P | CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5512M | CMOS-CCD 1H Delay Line for NTSC |
| CXL5512P | CMOS-CCD 1H Delay Line for NTSC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CXL5509M | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5509M/P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5509P | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CMOS-CCD 1H/2H Delay Line for NTSC |
| CXL5512M | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CMOS-CCD 1H Delay Line for NTSC |
| CXL5512M/P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-CCD 1H Delay Line for NTSC |
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