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E95836-TE
CXG1010N
Power Amplifier for PHS
For the availability of this product, please contact the sales office.
16 pin SSOP (Plastic)
Absolute Maximum Ratings
(Ta=25 °C)
Supply voltage
Voltage between gate and source
V
DD
6
V
Vgs0
I
DD
P
D
Tch
Top
Tstg
1.5
500
3
175
V
Drain current
Power dissipation
Channel temperature
Operating temperature
Storage temperature
mA
W
°C
°C
°C
–35 to +85
–65 to +150
Description
The CXG1010N is a power amplifier for PHS. This
IC is designed using the Sony’s GaAs J-FET process
and operates at a single power supply.
Features
High output power
Positive power supply drive
Low current consumption
High gain
Low distortion (ACP)
Small mold package 16-pin SSOP
21.5 dBm
V
DD
=3.4 V
200 mA
40 dB Typ.
–59 dBc Typ.
Structure
GaAs J-FET MMIC
1
Current consumption
1
Gate voltage adjustment value
Input VSWR
Output power (for –15.5 dBm input)
2
Power gain
2
Gain control
3
2
Average leak power level
(600 kHz±100 kHz)
2
Average leak power level
(900 kHz±100 kHz)
Item
Symbol
I
DD
V
GG2
VSWR
IN
P
OUT
G
P
Min.
Typ.
200
0.5
1.5
Max.
Unit
mA
V
—
dBm
dB
0
1.0
2.0
21.5
37
40
43
G
CTL
20
dB
P
LEAK600
–59
–54
dBc
P
LEAK900
–65
–59
dBc
Electrical Characteristics
V
DD
=3.4 V, V
CTL
=2.0 V, f=1.90 GHz
(Ta=25 °C)
1
This value is adjusted by V
GG
1 and V
GG
2 set with Sony’s recommended current adjustment method when
21.5 dBm is output. In this time, the voltage ratio of V
GG
1 and V
GG
2 should match to the voltage ratio
generated by the resistance of the recommended gate bias circuit.
2
When 21.5 dBm is output.
3
G
CTL
=G
P
(V
CTL
2.0 V)–G
P
(V
CTL
0 V)
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.