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| 型號(hào)： | CX77301 |
| 英文描述： | CX77301: PAM for Dual-Band EGSM / GPRS|PA Modules for GSM/GPRS Handsets |
| 中文描述： | CX77301：為雙頻EGSM / GPRS的|功率放大器模塊PAM控制GSM / GPRS手機(jī) |
| 文件頁(yè)數(shù)： | 11/14頁(yè) |
| 文件大小： | 517K |
| 代理商： | CX77301 |
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PA Module for Dual-band EGSM900 DCS1800 / GPRS
Data Sheet CX77301
100956E
Skyworks Solutions, Inc. Proprietary Information
[781] 376-7000 FAX [781] 376-3100 SALES@SKYWORKSINC.COM
WWW.SKYWORKSINC.COM
11
SEPTEMBER 19, 2003
TECHNICAL INFORMATION
CMOS Bias Controller Characteristics
The CMOS die within the PAM performs several functions that are
important to the overall module performance. Some of these
functions must be considered for development of the power
ramping features in a 3GPP compliant transmitter power control
loop.
Please refer to 3GPP TS 05.05, Digital Cellular Communica
tions System (Phase 2+); Radio Transmission and Reception.
All GSM specifications are now the responsibility of 3
GPP.
http://www.3GPP.org/specs/specs.htmPower ramping considerations will be discussed later in this sec-tion. The four main functions that will be described in this section
are Standby Mode Control, Band Select, Voltage Clamp, and
Current Buffer. The functional block diagram is shown in
Figure
7.
Dual Band GaAs Power Amplifier Die
Bandgap
Reference
Combinational
Logic
CMOS bias controller
ground
Supply
(pin 6)
C
bypass
C
bypass
RF
Isolation
RF
Isolation
Voltage Clamp
APC input
(pin 14)
Band
Select
(pin 16)
GSM900
bias out
DCS1800/
PCS1900
bias out
C
Comp
C
Comp
cpdcs
vodcs
vogsm
cpgsm
100956_008
Figure 7. Functional Block Diagram
Standby Mode Control
The Combinational Logic cell includes enable circuitry that
monitors the APC ramping voltage from the power amplifier con-
troller (PAC) circuit in the GSM transmitter. Typical handset de-
signs directly connect the PA V
CC
to the battery at all times, and
for some PA manufacturers this requires a control signal to set
the device in or out of standby mode. The Skyworks PAM does
not require a Transmit Enable input because it contains a standby
detection circuit that senses the V
APC
to enable or disable the PA.
This feature helps minimize battery discharge when the PA is in
standby mode. When V
APC
is below the enable threshold voltage,
the PA goes into a standby mode, which reduces battery current
(I
CC
)
to 6
μ
A, typical, under nominal conditions.
For voltages less than 700 mV at the APC input (pin 14), the PA
bias is held at ground. As the APC input exceeds the enable
threshold, the bias will activate. After an 8
μ
s delay, the amplifier
internal bias will ramp quickly to match the ramp voltage applied
to the APC input. In order for the internal bias to precisely follow
the APC ramping voltage, it is critical that a ramp pedestal is set
to the APC input at or above the enable threshold level with a
timing at least 8
μ
s prior to ramp-up. This will be discussed in
more detail in the following section, “Power Ramping Considera-
tions for 3GPP Compliance”.
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