
3
Agere Systems Inc.
Product Brief
September 2001
Host-Based Controller V.92 Modem Chip Set
Agere Systems DSP1648C
Functional Description
(continued)
Changes from DSP1648 (Mars3)
DSP1648C is a digital IC that provides the engine for
various modem standards. DSP1648C uses existing
DSP1648 specifications and functionality with some
enhancements. The following is a list of the new fea-
tures:
I
Support for V.92 and V.44:
—
Fast connect
—
Modem on hold
—
PCM upstream
—
Improved data compression
I
Additional on-chip RAM for V.92 support.
I
Additional PCI power management for future WHQL
requirements.
I
Lower power dissipation.
Integrated PCI Interface
The DSP1648C features a ROM-coded DSP1600 core
combined with the control and communications logic
required to implement a modem data pump. The
DSP1648 incorporates a PCI interface which supports
two full-duplex bus master streams for greater access
to host system resources. One PCI stream can be
switched between the audio codec interface or the DSP
core. The second full-duplex stream supports 4-word
block transfers between system and DSP core. 3.3 V
and 5 V signaling systems are supported for PCI bus
buffers. The device supply must come from a 3.3 V PCI
supply, vaux, or a regulated 3.3 V supply.
I/O Voltage Considerations
The system supply voltage requirement is
3.3 V ± 0.3 Vdc. This device also employs a 5 V
tolerant buffer topology. To support this 5 V tolerant I/O,
the VIO pin (pin 93) is provided as an indicator to the
device of the signaling voltage being used on the bus.
Figure 2. Agere Systems DSP1648C Host-Based Controller Modem Chip Set Block Diagram
without Audio Codec
0670 (F) d
TELEPHONE
LINE
HOST
PROCESSOR
PCI
ROM CODED
DSP1648C
100-PIN
TQFP
DSP1648C HOSTLUAGERE SYSTEMS
REMAINING
COMPONENTS
FOR
U-DAA
48-PIN TQFP
LINE
CODEC
UNIVERSAL
DAA
CSP1035A (LINE-POWERED)
U-DAA