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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | CS82C5296 |
| 寤犲晢锛� | Intersil |
| 鏂囦欢闋佹暩(sh霉)锛� | 4/20闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC UART/BRG 5V 16MHZ 28-PLCC |
| 妯欐簴鍖呰锛� | 750 |
| 鐗归粸锛� | 鍠姱鐗� UART/BRG |
| 閫氶亾鏁�(sh霉)锛� | 1锛孶ART |
| 瑕�(gu墨)绋嬶細 | RS232C |
| 闆绘簮闆诲锛� | 4.5 V ~ 5.5 V |
| 甯跺苟琛岀鍙ｏ細 | 鏄� |
| 甯舵晠闅滃暉鍕曚綅妾㈡脯鍔熻兘锛� | 鏄� |
| 甯惰(di脿o)鍒惰В瑾�(di脿o)鍣ㄦ帶鍒跺姛鑳斤細 | 鏄� |
| 甯禖MOS锛� | 鏄� |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 28-LCC锛圝 褰㈠紩绶氾級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 28-PLCC锛�11.51x11.51锛� |
| 鍖呰锛� | 甯跺嵎 (TR) |
绗�1闋�绗�2闋�绗�3闋�鐣跺墠绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�
12
FN2950.3
April 26, 2006
AC Electrical Specifications VCC = 5.0V 卤10%, TA = 0掳C to +70掳C (C82C52), TA = -40掳C to +85掳C (l82C52)
TA = -55掳C to +125掳C (M82C52)
Timing Requirements and Responses
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
(1)
TSVCTL
Select Setup to Control Leading Edge
30
-
ns
(2)
TCTHSX
Select Hold from Control Trailing Edge
50
-
ns
(3)
TCTLCTH
Control Pulse Width
150
-
ns
Control Consists of RD or
WR
(4)
TCTHCTL
Control Disable to Control Enable
190
-
ns
(5)
TRLDV
Read Low to Data Valid
-
120
ns
1, See AC Test Circuit
(6)
TRHDZ
Read Disable
0
60
ns
2, See AC Test Circuit
(7)
TDVWH
Data Setup Time
50
-
ns
(8)
TWHDX
Data Hold Time
20
-
ns
(9)
FC
Clock Frequency
0
16
MHz
TCHCL + TCLCH must be
鈮� 62.5ns
(10)
TCHCL
Clock High Time
25
-
ns
(11)
TCLCH
Clock Low Time
25
-
ns
(12)
TR/TF
IX Input Rise/Fall Time (External Clock)
-
tx
ns
Whichever is smaller
(13)
TFCO
Clock Output Fall Time
-
15
ns
CL = 50pf
(14)
TRCO
Clock Output Rise Time
-
15
ns
CL = 50pf
tx
1
6FC
------------or 50ns
鈮�
AC Testing Input, Output Waveforms
FIGURE 12. PROPAGATION DELAY
FIGURE 13. ENABLE/DISABLE DELAY
AC TESTING: All input signals (except IX and RST) must switch between VIL -0.4V and VIH +0.4V. Input rise and fall times are driven at 1ns/V.
INPUT
VIH + 0.4V
VIL - 0.4V
1.5V
VOH
VOL
OUTPUT
90%
10%
OUTPUT
82C52
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| CS82C52Z | 鍔熻兘鎻忚堪:UART 鎺ュ彛闆嗘垚闆昏矾 A/ANNEAL PERIPH UART /BRG 5V 16MHZ 28PLCC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 鏁�(sh霉)鎿�(j霉)閫熺巼:3 Mbps 闆绘簮闆诲-鏈€澶�:3.6 V 闆绘簮闆诲-鏈€灏�:2.7 V 闆绘簮闆绘祦:20 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 灏佽 / 绠遍珨:LQFP-48 灏佽:Reel |
| CS82C52Z96 | 鍔熻兘鎻忚堪:UART 鎺ュ彛闆嗘垚闆昏矾 A/ANNEAL PERIPH UART /BRG 5V 16MHZ 28PLCC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 閫氶亾鏁�(sh霉)閲�:2 鏁�(sh霉)鎿�(j霉)閫熺巼:3 Mbps 闆绘簮闆诲-鏈€澶�:3.6 V 闆绘簮闆诲-鏈€灏�:2.7 V 闆绘簮闆绘祦:20 mA 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 灏佽 / 绠遍珨:LQFP-48 灏佽:Reel |
| CS82C54 | 鍔熻兘鎻忚堪:瑷堟檪鍣ㄥ拰鏀寔鐢�(ch菐n)鍝� PERIPH PRG-CNTR 5V 8MHZ 28PLCC COM RoHS:鍚� 鍒堕€犲晢:Micrel 椤炲瀷:Standard 灏佽 / 绠遍珨:SOT-23 鍏�(n猫i)閮ㄥ畾鏅傚櫒鏁�(sh霉)閲�:1 闆绘簮闆诲-鏈€澶�:18 V 闆绘簮闆诲-鏈€灏�:2.7 V 鏈€澶у姛鐜囪€楁暎: 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 灏佽:Reel |
| CS82C54-1 | 鍒堕€犲晢:Intel 鍔熻兘鎻忚堪: |
| CS82C54-10 | 鍔熻兘鎻忚堪:瑷堟檪鍣ㄥ拰鏀寔鐢�(ch菐n)鍝� PERIPH PRG-CNTR 5V 10MHZ 28PLCC COM RoHS:鍚� 鍒堕€犲晢:Micrel 椤炲瀷:Standard 灏佽 / 绠遍珨:SOT-23 鍏�(n猫i)閮ㄥ畾鏅傚櫒鏁�(sh霉)閲�:1 闆绘簮闆诲-鏈€澶�:18 V 闆绘簮闆诲-鏈€灏�:2.7 V 鏈€澶у姛鐜囪€楁暎: 鏈€澶у伐浣滄韩搴�:+ 85 C 鏈€灏忓伐浣滄韩搴�:- 40 C 灏佽:Reel |
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