參數(shù)資料
型號: CS8221YDPR3
廠商: ZF Electronics Corporation
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: Micropower 5V, 100mA Low Dropout Linear Regulator
中文描述: 微5V的,100mA的低壓差線性穩(wěn)壓器
文件頁數(shù): 3/6頁
文件大小: 149K
代理商: CS8221YDPR3
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause instabil-
ity. The aluminum electrolytic capacitor is the least expen-
sive solution, but, if the circuit operates at low tempera-
tures (-25C to -40C), both the value and ESR of the
capacitor will vary considerably. The capacitor manufac-
turers data sheet usually provides this information.
The value for the output capacitor C
OUT
shown in the test
and applications circuit should work for most applica-
tions, however it is not necessarily the optimized solution.
To determine an acceptable value for C
OUT
for a particular
application, start with a tantalum capacitor of the recom-
mended value and work towards a less expensive alterna-
tive part.
Step 1:
Place the completed circuit with a tantalum capac-
itor of the recommended value in an environmental cham-
ber at the lowest specified operating temperature and
monitor the outputs with an oscilloscope. A decade box
connected in series with the capacitor will simulate the
higher ESR of an aluminum capacitor. Leave the decade
box outside the chamber, the small resistance added by
the longer leads is negligible.
Step 2:
With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no oscil-
lations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3:
Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4
: Maintain the worst case load conditions set in step
3 and vary the input voltage until the oscillations increase.
This point represents the worst case input voltage condi-
tions.
Step 5:
If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capaci-
C
1
**
0.1
m
F
V
IN
Sense*
V
OUT
CS8221
C
2
***
10
m
F
Gnd
Output Stage Protection
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 1).
If the input voltage rises above 34V (typ), the output shuts
down. This response protects the internal circuitry and
enables the IC to survive unexpected voltage transients.
Should the junction temperature of the power device
exceed 180C (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle heat
source in the IC.
I
OUT
V
OUT
V
IN
Load
Dump
Short
Circuit
Thermal
Shutdown
> 30V
3
C
Application Notes
Application & Test Diagram
Voltage Reference and Output Circuitry
Stability Considerations
Circuit Description
Figure 1. Typical Circuit Waveforms for Output Stage Protection.
* 8 Lead SO Narrow only
**C1 is required if regulator is distant from power source filter.
***C2 is required for stability.
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