參數(shù)資料
型號: CS8129
廠商: ZF Electronics Corporation
英文描述: 5V, 750mA Low Dropout Linear Regulator with Lower RESET Threshold
中文描述: 5V的,七五○毫安低壓降線性穩(wěn)壓器與下復(fù)位門限
文件頁數(shù): 2/8頁
文件大?。?/td> 188K
代理商: CS8129
* To observe safe operating junction temperatures, low duty cycle pulse testing is used in tests where applicable.
Delay Time =
= C
Delay
x 3.5 x 10
5
(typ)
Note 1: assuming ideal capacitor
C
Delay
x V
Delay Threshold Charge
I
Charge
Electrical Characteristics:
-40C 2 T
A
2 + 125C, -40C 2 T
2 +150C, 6V 2 V
IN
2 26V, 5mA 2 I
OUT
2 500mA, R
unless otherwise noted*
= 4.7k to V
OUT
RESET
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Absolute Maximum Ratings
Input Operating Range..................................................................................................................................................-0.5 to 26V
Power Dissipation.............................................................................................................................................Internally Limited
Peak Transient Voltage (46V Load Dump @ 14V V
IN
) ...............................................................................................-50V, 60V
Output Current.................................................................................................................................................Internally Limited
ESD Susceptibility (Human Body Model)..............................................................................................................................4kV
Junction Temperature.............................................................................................................................................-55C to 150C
Storage Temperature...............................................................................................................................................-55C to 150C
Lead Temperature Soldering
Wave Solder (through hole styles only).....................................................................................10 sec. max, 260C peak
Reflow (SMD styles only)......................................................................................60 sec. max above 183C, 230C peak
C
2
I
Output Stage (V
OUT
)
Output Voltage
Dropout Voltage
Supply Current
4.85
5.00
0.35
2
6
55
5
10
75
5.15
0.60
7
12
100
50
50
V
V
I
OUT
= 500mA
I
OUT
2 10mA
I
OUT
2 100mA
I
OUT
2 500mA
6V 2 V
IN
2 26V, I
OUT
= 50mA
50mA 2 I
OUT
2 500mA, V
IN
= 14V
f = 120Hz, V
IN
= 7 to 17V,
I
OUT
= 250mA
mA
Line Regulation
Load Regulation
Ripple Rejection
mV
mV
dB
54
Current Limit
Overvoltage Shutdown
Reverse Polarity Input
Voltage DC
Thermal Shutdown
0.75
32
-15
1.20
A
V
V
40
V
OUT
3 -0.6V, 10 Load
-30
Guaranteed by Design
150
180
210
C
I
and Delay Functions
Delay Charge Current
Threshold
RESET
V
DELAY
= 2V
V
OUT
Increasing, V
RT(ON)
V
OUT
Decreasing, V
RT(OFF)
V
RH
=V
RT(ON)
- V
RT(OFF)
Charge, V
DC(HI)
Discharge, V
DC(LO)
5
10
4.35
4.20
150
3.50
3.10
400
0.1
0
15
4.50
4.45
250
3.75
3.35
800
0.4
10
μA
V
V
mV
V
V
mV
V
μA
4.05
4.00
50
3.25
2.85
200
Hysteresis
Delay Threshold
Delay Hysteresis
Output Voltage Low1V < V
OUT
< V
RT(L)
, 3k to V
OUT
Output Leakage
V
OUT
> V
RT(H)
Current
Delay Capacitor
Discharge Latched òONó,
Discharge Voltage
V
OUT
> V
RT
Delay Time
C
DELAY
= 0.1μF (Note 1)
0.2
0.5
V
16
32
48
ms
RESET
RESET
RESET
RESET
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PDF描述
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