參數(shù)資料
型號: CS5530-ISZ
廠商: Cirrus Logic Inc
文件頁數(shù): 27/36頁
文件大?。?/td> 0K
描述: IC ADC 24BIT 1CH W/LNA 20SSOP
標準包裝: 66
位數(shù): 24
采樣率(每秒): 3.84k
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 45mW
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 管件
輸入數(shù)目和類型: 1 個差分,單極;1 個差分,雙極
產(chǎn)品目錄頁面: 755 (CN2011-ZH PDF)
配用: 598-1158-ND - BOARD EVAL FOR CS5530
其它名稱: 598-1283-5
CS5530
DS742F3
33
Measurement and Reference Inputs
AIN1+, AIN1- – Differential Analog Input
Differential input pins into the device.
VREF+, VREF- – Voltage Reference Input
Fully differential inputs which establish the voltage reference for the on-chip modulator.
C1, C2 – Amplifier Capacitor Inputs
Connections for the instrumentation amplifier’s capacitor.
Power Supply Connections
VA+ – Positive Analog Power
Positive analog supply voltage.
VD+ – Positive Digital Power
Positive digital supply voltage (nominally +3.0 V or +5 V).
VA- – Negative Analog Power
Negative analog supply voltage.
DGND – Digital Ground
Digital Ground.
4. SPECIFICATION DEFINITIONS
Linearity Error
The deviation of a code from a straight line which connects the two endpoints of the ADC
transfer function. One endpoint is located 1/2 LSB below the first code transition and the other
endpoint is located 1/2 LSB beyond the code transition to all ones. Units in percent of full-
scale.
Differential Nonlinearity
The deviation of a code's width from the ideal width. Units in LSBs.
Full-scale Error
The deviation of the last code transition from the ideal [{(VREF+) - (VREF-)} - 3/2 LSB]. Units
are in LSBs.
Unipolar Offset
The deviation of the first code transition from the ideal (1/2 LSB above the voltage on the AIN-
pin.). When in unipolar mode (U/B bit = 1). Units are in LSBs.
Bipolar Offset
The deviation of the mid-scale transition (111...111 to 000...000) from the ideal (1/2 LSB below
the voltage on the AIN- pin). When in bipolar mode (U/B bit = 0). Units are in LSBs.
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CS5531 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
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