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參數(shù)資料
| 型號： | CS5372A-ISZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 6/32頁 |
| 文件大小： | 0K |
| 描述： | IC MODULATOR LP/HP 2CH 24-SSOP |
| 標準包裝： | 59 |
| 類型： | 調(diào)制器 |
| 分辨率（位）： | 24 b |
| 采樣率（每秒）： | 512k |
| 電壓電源： | 模擬和數(shù)字，雙 ± |
| 電源電壓： | ±2.5V，3.3 V ~ 5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-SSOP（0.209"，5.30mm 寬） |
| 供應商設備封裝： | 24-SSOP |
| 包裝： | 管件 |
| 配用： | 598-1778-ND - EVALUATION BOARD FOR CS5376 |
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CS5371A CS5372A
14
DS748F3
3. MODULATOR OPERATION
The CS5371A and CS5372A are one- and
two-channel, fourth-order
ΔΣ modulators opti-
mized for extremely high-resolution measure-
ment of signals between DC and 2000 Hz.
When combined with CS3301A / CS3302A dif-
ferential amplifiers, the CS4373A test DAC
and CS5376A digital filter, a small, low-power,
self-testing,
high-accuracy,
multi-channel
measurement system results.
The CS5371A and CS5372A modulators have
high dynamic range and low total harmonic
distortion with very low power consumption
and are optimized for extremely high-resolu-
tion measurement of 5 Vp-p or smaller differen-
tial signals. They convert analog input signals
from the CS3301A / CS3302A differential am-
plifiers to an oversampled serial bit stream at
512 kbits per second which is then passed to
the digital filter.
The companion CS5376A digital filter gener-
ates the clock and synchronization inputs for
the CS5371A / CS5372A modulators while re-
ceiving the one-bit data and over-range flag
outputs. The digital filter decimates the modu-
lator’s oversampled output bit stream to a
high-resolution, 24-bit output at the selected
output word rate.
3.1 One’s Density
In normal operation a differential analog input
signal is converted to an oversampled
ΔΣ seri-
al bit stream on the MDATA output, with a
one’s density proportional to the differential
amplitude of the analog input signal.
One’s density of the MDATA output is defined
as the ratio of ‘1’ bits to total bits in the serial
bit stream output, i.e. an 86% one’s density
has, on average, a ‘1’ value in 86 of every 100
output data bits. The MDATA output has a
nominal 50% one’s density for a mid-scale dif-
ferential input, approximately 86% one’s den-
sity for a positive full-scale input signal, and
approximately 14% one’s density for a nega-
tive full-scale input signal.
Clock
Generator
INF1+
VREF+
VREF-
VA+
VA-
VD
GND
PWDN1
MFLAG1
MDATA1
MCLK
MSYNC
MFLAG2
MDATA2
PWDN2
INF1-
INR1-
INR1+
INF2+
INF2-
INR2-
INR2+
4th Order
ΔΣ Modulator
4th Order
ΔΣ Modulator
OFST
CS5372A
Clock
Generator
INF+
VREF+
VREF-
VA+
VA-
VD
GND
PWDN
MFLAG
MDATA
MCLK
MSYNC
INF-
INR-
INR+
4th Order
ΔΣ Modulator
OFST
CS5371A
Figure 10. CS5371A and CS5372A Block Diagrams
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CS5372A-ISZ/A0 | 制造商:Cirrus Logic 功能描述: |
| CS5372A-ISZR | 功能描述:模數(shù)轉換器 - ADC LP High Performance Delta Sigma Mod. RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5372-BS | 功能描述:模數(shù)轉換器 - ADC LP High Performance Delta Sigma Mod. RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5372-BSR | 功能描述:模數(shù)轉換器 - ADC LP High Performance Delta Sigma Mod. RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| CS5372-BSZ | 功能描述:模數(shù)轉換器 - ADC IC LP Hgh Prfrmnc Delta Sigma Modultr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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