參數(shù)資料
型號(hào)： CS5372-BSZR
廠商： Cirrus Logic Inc
文件頁(yè)數(shù)： 4/22頁(yè)
文件大?。?/td> 0K
描述： IC MODULATOR LP/HP 2CH 24-SSOP
標(biāo)準(zhǔn)包裝： 1,000
類型： 調(diào)制器
分辨率（位）： 24 b
采樣率（每秒）： 512k
電壓電源： 模擬和數(shù)字，雙 ±
電源電壓： ±2.5V，3.3 V ~ 5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 24-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 24-SSOP
包裝： 帶卷 (TR)
配用： 598-1778-ND - EVALUATION BOARD FOR CS5376
CS5371 CS5372
12
DS255F3
over which voltage reference noise affects the
CS5371/72 modulator dynamic range.
6.1.
Voltage Reference Configurations
For a 2.5 V reference, the Linear Technology
LT1019-2.5 voltage reference yields low enough
noise if the output is filtered with a low pass RC fil-
ter as shown in Figure 6. The filtered version in
Figure 6 is acceptable for most spectral measure-
ment applications, but a buffered version with low-
er source impedance may be preferred for DC
measurement applications.
6.2.
VREF Input Impedance
The switched-capacitor input architecture of the
VREF+ pin causes the input current required from
the voltage reference to change any time MCLK is
changed. The input impedance of the voltage ref-
erence input is calculated similar to the analog sig-
nal input impedance as [1 / (f * C)] where f is the
modulator clock frequency, MCLK, and C is the in-
ternal sampling capacitor.
A 2.048 MHz MCLK
yields a voltage reference input impedance of ap-
proximately [1 / (2.048 MHz)*(20 pF)], or about
24 k
.
6.3.
Gain Accuracy
Gain accuracy of the CS5371/72 modulators is af-
fected by variations of the voltage reference input.
A change in the voltage reference input impedance
due to a change in MCLK could affect gain accura-
cy when using the higher source impedance con-
figuration of Figure 6.
The VREF+ pin input
impedance and the external low-pass filter resistor
create a voltage divider for the output reference
voltage, reducing the effective voltage reference
input. If gain error is to be minimized, especially
when MCLK is to be changed, the voltage refer-
ence should have a low output impedance to mini-
mize the effect of the resistive voltage divider. A
buffered voltage reference configuration offers
lower output impedance and more stable gain
characteristics.
6.4.
Gain Drift
Gain drift of the CS5371/72 modulators due to tem-
perature is around 5 ppm/°C, and does not include
the temperature drift characteristics of the external
voltage reference. Gain drift is not affected by the
modulator sample rate or by power supply varia-
tions.
7. DIGITAL FILTER INTERFACE
The CS5371/72 modulators are designed to oper-
ate with the CS5376A and CS5378 digital filters.
The digital filter generates the modulator clock and
synchronization
signal
inputs
(MCLK
and
MSYNC), while receiving the modulator data and
over-range flag outputs (MDATA and MFLAG).
The modulators produce an oversampled
Σ serial
10
To VREF+
To VREF -
0.1
F
100
F
+
+VA
2.5 REF
0.1
F
10
F
-VA
0.1
F
10
F
Figure 6. 2.5 Voltage Reference
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CS5373A-ISZR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC Dlt-Sgm Modulator w/Intgrtd Tst DAC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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