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參數(shù)資料
| 型號： | CS5346-DQZ |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | ADC |
| 中文描述： | 2-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PQFP48 |
| 封裝： | LEAD FREE, MS-022, LQFP-48 |
| 文件頁數(shù)： | 20/40頁 |
| 文件大?。?/td> | 402K |
| 代理商： | CS5346-DQZ |
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DS861PP2
27
CS5346
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in Figure 16, the write operation is aborted after the acknowledge for the MAP byte by sending a stop con-
dition. The following pseudocode illustrates an aborted write operation followed by a read operation.
Send start condition.
Send 10011xx0 (chip address & write operation).
Receive acknowledge bit.
Send MAP byte.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 10011xx1(chip address & read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
5.8
Interrupts and Overflow
The CS5346 has a comprehensive interrupt capability. The INT output pin is intended to drive the interrupt
input pin on the host microcontroller. The INT pin may function as either an active high CMOS driver or
an active-low, open-drain driver (see “Active High/Low (Bit 0)” on page 35). When configured as active
low open-drain, the INT pin has no active pull-up transistor, allowing it to be used for wired-OR hook-ups
with multiple peripherals connected to the microcontroller interrupt input pin. In this configuration, an ex-
ternal pull-up resistor must be placed on the INT pin for proper operation.
Many conditions can cause an interrupt, as listed in the interrupt status register descriptions (see “Inter-
rupt Status - Address 0Dh” on page 35). Each source may be masked off through mask register bits. In
addition, Each source may be set to rising edge, falling edge, or level-sensitive. Combined with the option
of level-sensitive or edge-sensitive modes within the microcontroller, many different configurations are
possible, depending on the needs of the equipment designer.
The CS5346 also has a dedicated overflow output. The OVFL pin functions as active low open drain and
has no active pull-up transistor, thereby requiring an external pull-up resistor. The OVFL pin outputs an
OR of the ADCOverflow and ADCUnderflow conditions available in the Interrupt Status register; however,
these conditions do not need to be unmasked for proper operation of the OVFL pin.
SCL
CHIP ADDRESS (WRITE)
MAP BYTE
DATA
DATA +1
START
ACK
STOP
ACK
1
0 0
1 1 AD1 AD0 0
SDA
1
0 0
1 1 AD1 AD0 1
CHIP ADDRESS (READ)
START
7
6
5
4
3
2 1 0
7
0
7
0
7
0
NO
16
8
9
12 13 14 15
4
5
6
7
0
1
20 21 22 23 24
26 27 28
2
3
10 11
17 18 19
25
ACK
DATA + n
STOP
Figure 16. Control Port Timing, IC Read
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| CS5346-DQZR | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC 103dB 24Bit 192kHz Stereo Audio ADC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| CS5349-000 | 制造商:TE Connectivity 功能描述:4110-10-340812 |
| CS5349-BP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| CS5349-BS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
| CS5349-KP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 16-Bit |
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