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參數(shù)資料
| 型號： | CS5165H |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | Fast, Precise 5-Bit Synchronous Buck Controller for the Next Generation Low Voltage Pentium II Processors |
| 中文描述： | 快速，精確的5位同步降壓控制器，用于下一代低電壓奔騰II處理器 |
| 文件頁數(shù)： | 12/19頁 |
| 文件大小： | 278K |
| 代理商： | CS5165H |
Figure 15: PWRGD signal becomes logic high as V
enters -8.5% of
lower PWRGD threshold, V
OUT
= +2.84V (DAC = 10111)
Figure 16: Power Good response to an out of regulation condition.
Figure 16 shows the relationship between the regulated
output voltage V
FB
and the Power Good signal. To prevent
Power Good from interrupting the CPU unnecessarily, the
CS5165 has a built-in delay to prevent noise at the V
FB
pin
from toggling Power Good. The internal time delay is
designed to take about 75μs for Power Good to go low and
65μs for it to recover. This allows the Power Good signal to
be completely insensitive to out of regulation conditions
that are present for a duration less than the built in delay
(see figure 17).
It is therefore required that the output voltage attains an
out of regulation or in regulation level for at least the built-
in delay time duration before the Power Good signal can
change state.
Figure 17: Power Good is insensitive to out of regulation conditions
that are present for a duration less than the built in delay.
Selecting External Components
The CS5165 buck regulator can be used with a wide range
of external power components to optimize the cost and
performance of a particular design. The following informa-
tion can be used as general guidelines to assist in their
selection.
NFET Power Transistors
Both logic level and standard FETs can be used. The refer-
ence designs derive gate drive from the 12V supply which
is generally available in most computer systems and utilize
logic level FETs. A charge pump may be easily implement-
ed to support 5V only systems. Multiple FET’s may be par-
alleled to reduce losses and improve efficiency and ther-
mal management.
Voltage applied to the FET gates depends on the applica-
tion circuit used. Both upper and lower gate driver outputs
are specified to drive to within 1.5V of ground when in the
low state and to within 2V of their respective bias supplies
when in the high state. In practice, the FET gates will be
driven rail to rail due to overshoot caused by the capacitive
load they present to the controller IC. For the typical appli-
cation where V
CC
= 12V and 5V is used as the source for
the regulator output current, the following gate drive is
provided:
V
GS (TOP)
= 12V - 5V = 7V, V
GS(BOTTOM)
= 12V (see Figure 18).
Trace 1 PWRGD (2V/div)
FB
(1V/div)
Trace 1 PWRGD (2V/div)
Trace 4 V
FB
(1V/div)
Trace 2 - PWRGD (2V/div)
OUT
(1V/div)
C
12
Application Information: continued
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| CS-5165HDW16 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Voltage-Mode SMPS Controller |
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| CS5165HGDWR16 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CS5166 | 功能描述:SCREWDRIVER,5/16"X6",SLOTTED 制造商:apex tool group 系列:* 零件狀態(tài):在售 標準包裝:1 |
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