參數(shù)資料
型號: CS5156GDR16
廠商: ZF Electronics Corporation
英文描述: CPU 5-Bit Nonsynchronous Buck Controller
中文描述: CPU的5位非同步降壓控制器
文件頁數(shù): 9/14頁
文件大?。?/td> 308K
代理商: CS5156GDR16
C
Applications Information: continued
9
Figure 9: CS5156 demonstration board response to 13A load turn off
(output set for 2.8V). V
2
control topology immediately connects
inductor to ground, providing 0% duty cycle. Regulation is achieved in
less than 10μs.
V
CC1
Monitor
To maintain predictable startup and shutdown characteris-
tics an internal V
CC1
monitor circuit is used to prevent the
part from operating below 3.75V minimum startup. The
V
CC1
monitor comparator provides hysteresis and guaran-
tees a 3.70V minimum shutdown threshold.
Short Circuit Protection
A lossless hiccup mode short circuit protection feature is
provided, requiring only the soft start capacitor to imple-
ment. If a short circuit condition occurs (V
FFB
< 1V), the V
FFB
low comparator sets the FAULT latch. This causes the MOS-
FET to shut off, disconnecting the regulator from its input
voltage. The soft start capacitor is then slowly discharged by
a 2μA current source until it reaches its lower 0.7V threshold.
The regulator will then attempt to restart normally, operating
in its extended off time mode with a 50% duty cycle, while
the soft start capacitor is charged with a 60μA charge current.
If the short circuit condition persists, the regulator output
will not achieve the 1V low V
FFB
comparator threshold
before the soft start capacitor is charged to its upper 2.5V
threshold. If this happens the cycle will repeat itself until the
short is removed. The soft start charge/discharge current
ratio sets the duty cycle for the pulses (2μA/60μA = 3.3%),
while actual duty cycle is half that due to the extended off
time mode (1.65%).
This protection feature results in less stress to the regulator
components, input power supply, and PC board traces
than occurs with constant current limit protection (see
Figures 10 and 11).
If the short circuit condition is removed, output voltage
will rise above the 1V level, preventing the FAULT latch
from being set, allowing normal operation to resume.
Figure 10: CS5156 demonstration board hiccup mode short circuit pro-
tection. Gate pulses are delivered while the soft start capacitor charges,
and cease during discharge.
Figure 11: Startup with regulator output shorted.
Overvoltage Protection
Overvoltage protection (OVP) is provided as result of the
normal operation of the V
2
control topology and requires
no additional external components. The control loop
responds to an overvoltage condition within 100ns, causing
the MOSFET to shut off, disconnecting the regulator from
its input voltage.
Trace 4 = 5V from PC Power Supply (2V/div.)
Trace 2 = Inductor Switching Node (2V/div.)
Trace 4 - 5V Supply Voltage (2V/div.)
Trace 3 - Soft Start Timing Capacitor (1V/div.)
Trace 2 - Inductor Switching Node (2V/div.)
Protection and Monitoring Features
Trace1 - Regulator Output Voltage (1V/div.)
Trace 2 - Inductor Switching Node (5V/div.)
Trace 3 - Output Current (13 to 0.5 Amps) (20V/div.)
相關PDF資料
PDF描述
CS5156 CPU 5-Bit Nonsynchronous Buck Controller
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CS5157GDR16 CPU 5-Bit Synchronous Buck Controller
CS5157 CPU 5-Bit Synchronous Buck Controller
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