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PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4
C
Package Pin Description
PACKAGE PIN #
PIN SYMBOL
FUNCTION
Electrical Characteristics:
0°C < T
A
< +70°C; 0°C < T
J
< +125°C; 8V < V
CC1
< 14V; 5V < V
CC2
< 20V; DAC Code: V
ID2
= V
ID1
=
V
ID0
= 1; V
ID3
= 0; CV
GATE(L)
and CV
GATE(H)
= 1nF; C
OFF
= 330pF; C
SS
= 0.1μF, unless otherwise specified.
I
Time Out Timer
Time Out Time
V
FB
= V
COMP
; V
FFB
= 2V;
Record V
GATE(H)
Pulse High Duration
V
FFB
= 0V
10
30
65
μs
Fault Mode Duty Cycle
35
50
70
%
Note 1: Guaranteed by design, not 100% tested in production.
16L SO Narrow
1,2,3,4
V
ID0
– V
ID3
Voltage ID DAC input pins. These pins are internally pulled up to 5V
providing logic ones if left open. The DAC range is 2.14V to 3.54V with
100mV increments. V
ID0
- V
ID3
select the desired DAC output voltage.
Leaving all 4 DAC input pins open results in a DAC output voltage of
1.244V, allowing for adjustable output voltage, using a traditional resis-
tor divider.
5
SS
Soft Start Pin. A capacitor from this pin to LGnd in conjunction with
internal 60μA current source provides soft start function for the con-
troller. This pin disables fault detect function during Soft Start. When a
fault is detected, the soft start capacitor is slowly discharged by internal
2μA current source setting the time out before trying to restart the IC.
Charge/discharge current ratio of 30 sets the duty cycle for the IC when
the regulator output is shorted.
6
NC
No connection.
7
C
OFF
A capacitor from this pin to ground sets the time duration for the on
board one shot, which is used for the constant off time architecture.
8
V
FFB
Fast feedback connection to the PWM comparator. This pin is connected
to the regulator output. The inner feedback loop terminates on time.
9
V
CC2
V
GATE(H)
Boosted power for the high side gate driver.
10
High FET driver pin capable of 1.5A peak switching current. Internal cir-
cuit prevents V
GATE(H)
and V
GATE(L)
from being in high state simultane-
ously.
11
PGnd
High current ground for the IC. The MOSFET drivers are referenced to
this pin. Input capacitor ground and the source of lower FET should be
tied to this pin.
12
V
GATE(L)
V
CC1
LGnd
Low FET driver pin capable of 1.5A peak switching current.
13
Input power for the IC and low side gate driver.
14
Signal ground for the IC. All control circuits are referenced to this pin.
15
COMP
Error amplifier compensation pin. A capacitor to ground should be pro-
vided externally to compensate the amplifier.
16
V
FB
Error amplifier DC feedback input. This is the master voltage feedback
which sets the output voltage. This pin can be connected directly to the
output or a remote sense trace.