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參數(shù)資料
| 型號： | CS5112EDWF24 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | 1.4A Switching Regulator with 5V, 100mA Linear Regulator with Watchdog, RESET and ENABLE |
| 中文描述： | 1.4A的開關(guān)穩(wěn)壓器采用5V，100mA的線性穩(wěn)壓器，帶有看門狗，復(fù)位和啟用 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 199K |
| 代理商： | CS5112EDWF24 |
7
Application Notes
C
Circuit Description: continued
Figure 6: Block diagram of the 1.4A current mode control switching regulator portion of the CS5112 in a boost configuration.
V
OUT
R
1
V
FB1
V
FB2
R
2
R
3
V
R2
R
EQ
{
Figure 8. Feedback sense
resistor divider connected
between V
OUT
and ground.
-1
V
OUT
V
FB1
This section outlines a procedure for designing a boost switch-
ing power supply operating in the discontinuous mode.
Step 1
Determine the output power required by the load.
P
OUT
= I
OUT
V
OUT
(1)
Step 2
Choose C
OSC
based on the target oscillator frequency with an
external resistor value, R
BIAS
= 64.9k. (See Figure 1d).
Figure 7: Voltage and current waveforms for boost topology in CS5112.
Step 3
Next select the output voltage feedback sense resistor
divider as follows (Figure 8).
For V
FB1
active, choose a value for R
1
and then solve for
R
EQ
where:
R
EQ
=
.
(3a)
For V
FB2
active, find:
V
FB1
= V
OUT
, (3b)
and then calculate R
2
where:
R
2
=
=
. (3c)
Then find R
3
, where:
R
3
= R
EQ
- R
2
.
(3d)
V
FB1
- V
FB2
V
FB1
/R
EQ
V
R2
I
R2
)
R
EQ
R
1
+ R
EQ
(
R
1
0
V
SW
V
IN
V
SAT
t
0
I
SW
I
Peak
t
0
I
D
I
Peak
t
V
OUT
Design Procedure for Boost Topology
V
IN
1.4A
V
SW
COMP
V
FB1
V
FB2
SELECT
V
LIN
I
BIAS
C
OSC
Gnd
Bandgap
Reference
Oscillator
+
-
Switcher Shutdown
1.25V
Switcher
Error
Amplifier
Current Sense Amplifier
ENABLE
Multiplexer
+
-
+
-
COMP
Base Drive
Logic
R
BIAS
64.9k
W
R
S
R
3
R
2
R
1
V
OUT
C
OUT
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| CS5112EDWFR24 | 制造商:CHERRY 制造商全稱:CHERRY 功能描述:1.4A Switching Regulator with 5V, 100mA Linear Regulator with Watchdog, RESET and ENABLE |
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| CS5112KP24 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Converter IC |
| CS5112KP7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Converter IC |
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