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參數(shù)資料
| 型號： | CS51033 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Fast PFET Buck Controller |
| 中文描述： | 快速PFET的降壓控制器 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 159K |
| 代理商： | CS51033 |
C
4
Block Diagram
G5
C
OSC
CS
V
CC
V
C
V
GATE
PGnd
V
FB
Gnd
R
S
2.5V
1.5V
1.25V
1.15V
Q
F2
G2
G1
A1
A6
RG
V
CC
A3
+
2.4V
G3
A2
2.5V
1.5V
I
C
7I
C
V
CC
+
-
I
T
Q
I
T
5
I
T
55
G4
Fault
Comp
+
-
+
-
+
-
A4
0.7V
2.3V
Q
R
Q
S
F1
Slow Discharge
Comparator
Slow Discharge
Flip-Flop
CS Charge
Sense
Comparator
CS
Comparator
Oscillator
Comparator
V
Comparator
V
Flip-Flop
Off
Comp
Control Scheme
The CS51033 monitors the output voltage to determine
when to turn on the PFET. If V
FB
falls below the internal ref-
erence voltage of 1.25V during the oscillator’s charge cycle,
the PFET is turned on and remains on for the duration of the
charge time. The PFET gets turned off and remains off dur-
ing the oscillator’s discharge cycle time with the maximum
duty cycle to 80%. It requires 7mV typical, and 20mV maxi-
mum ripple on the V
FB
pin is required to operate. This
method of control does not require any loop stability com-
pensation.
Startup
The CS51033 has an externally programmable soft start fea-
ture that allows the output voltage to come up slowly, pre-
venting voltage overshoot on the output.
At startup, the voltage on all pins is zero. As V
CC
rises, the
V
C
voltage along with the internal resistor R
G
keeps the
PFET off. As V
CC
and V
C
continue to rise, the oscillator
capacitor (C
OSC
) and the Soft start/Fault Timing capacitor
(CS) charges via internal current sources. C
OSC
gets charged
by the current source I
C
and CS gets charged by the I
T
source combination described by:
I
CS
= I
T
-
(
+
)
The internal Holdoff Comparator ensures that the external
PFET is off until V
CS
> 0.7V preventing the GATE flip-flop
(F2) from being set. This allows the oscillator to reach its
operating frequency before enabling the drive output. Soft
start is obtained by clamping the V
FB
comparator’s (A6) ref-
erence input to approximately 1/2 of the voltage at the CS
pin during startup, permitting the control loop and the out-
put voltage to slowly increase. Once the CS pin charges
above the Holdoff Comparator trip point of 0.7V, the low
I
T
5
I
T
55
Theory of Operation
Circuit Description
Figure 1: Block Diagram for CS51033
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| CS-51033 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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