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參數(shù)資料
| 型號： | CS51022EDR16 |
| 廠商： | ZF Electronics Corporation |
| 英文描述： | Enhanced Current Mode PWM Controller |
| 中文描述： | 增強電流模式PWM控制器 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 170K |
| 代理商： | CS51022EDR16 |
3
C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Electrical Characteristics: -40°C < T
A
< 85°C, -40°C < T
J
< 150°C, 3V < V
C
< 20V, 8.2V < V
CC
< 20V,
R
T
= 12k
, C
T
= 390pF, unless otherwise stated
I
Error Amplifier continued
COMP High Voltage
V
FB
= 2.3V
V
FB
= 2.7V
FREQ = 120Hz (Note 1)
V
SS
=2.5V, V
FB
= 0V, I
SET
= 2V
(Note 1)
4.35
4.8
5
V
COMP Low Voltage
0.4
0.8
1.2
V
PS Ripple Rejection
SS Clamp, V
COMP
I
LIM(SET)
Clamp
60
2.4
85
2.5
dB
V
2.6
0.95
1
1.15
V
I
Oscillator
Accuracy
R
T
= 12k, C
T
= 390pF
Delta Frequency 8.2V < V
CC
< 20V
T
MIN
< T
A
< T
MAX
(Note1)
(Note1)
R
T
= 12k, C
T
= 390pF
(Note 1)
(Note 1)
10k Resistor to ground on R
T
C
T
230
255
280
kHz
Voltage Stability
2
3
%
Temperature Stability
8
%
Min Charge & Discharge Time
Duty Cycle Accuracy
0.333
70
μs
%
77
83
Peak Voltage
Valley Voltage
Valley Clamp Voltage
3
V
V
V
1.5
1.4
1.2
1.6
Discharge Current
Discharge Current
0.8
0.925
1
1
1.2
1.075
mA
mA
T
A
=25°C (Note 1)
I
Synchronization (CS51021/23)
Input Threshold
Output Pulsewidth
Output High Voltage
1.0
160
3.5
1.5
260
4.3
2.7
360
4.8
V
ns
V
I
SYNC
= 100μA
(Note 1)
SYNC to GATE RESET
1k Load
Input Resistance
Drive Delay
Output Drive Current
35
80
1.25
70
120
2
140
150
3.5
k
ns
mA
I
SLEEP (CS51022/24)
SLEEP Input Threshold
SLEEP Input Current
Active High
V
SLEEP
= 4V
V
CC
≤
15V
1.0
11
1.5
25
2.7
46
V
μA
I
CC
@ SLEEP
50
100
μA
I
GATE Driver
HIGH Voltage
Measure V
C
-GATE, V
C
= 10V, 150mA Load
Measure GATE-PGnd, 150mA SINK
V
C
= 20V, 1nF
Measured at 10mA Output Current
V
C
= 20V, 1nF (Note 1)
V
C
= 20V, measured at 0V
Load = 1nF, 1V < GATE< 9V,
V
C
= 20V, T
A
= 25
C
Load = 1nF, 9V > GATE> 1V, V
C
= 20V
1.5
2.2
V
LOW Voltage
HIGH Voltage Clamp
1.2
13.5
1.5
16
V
V
11
LOW Voltage Clamp
Peak Current
0.6
1
0.8
V
A
UVL Leakage
-1
-50
μA
RISE Time
60
100
ns
FALL Time
15
40
ns
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