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參數(shù)資料
| 型號(hào)： | CS4391A-KZZR |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 15/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 24BIT 192KHZ W/VC 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 4,000 |
| 位數(shù)： | 24 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 175mW |
| 工作溫度： | -10°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電壓，單極 |
| 采樣率（每秒）： | 192k |
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CS4391A
22
DS600PP3
5.
PIN DESCRIPTION - PCM DATA MODE
Reset - RST
Pin 1, Input
Function:
Hardware Mode: The device enters a low power mode and the internal state machine is reset to the de-
fault setting when low. When high, the device becomes operational.
Control Port Mode: The device enters a low power mode and all internal registers are reset to the default
settings, including the control port, when low. When high, the control port becomes operational and the
PDN bit must be cleared before normal operation will occur. The control port can not be accessed when
reset is low. The Control Port Enable Bit must also be enabled after a device reset.
RST is required to remain low until the power supplies and clocks are applied and stable.
Interface Power - VL
Pin 2, Input
Function:
Digital interface power supply. The voltage on this pin determines the logic level high threshold for the
digital inputs.
Serial Audio Data - SDATA
Pin 3, Input
Function:
Two's complement MSB-first serial data is input on this pin. The data is clocked into SDATA via the serial
clock and the channel is determined by the Left/Right clock. The required relationship between the
Left/Right clock, serial clock and serial data is defined by the Mode Control Byte in Control Port Mode or
the Mode Pins in Hardware Mode. The options are detailed in Figures 7-24.
Reset
RST
AMUTEC
Channel A Mute Control
Logic Voltage
VL
AOUTA-
Differential Output
Serial Data
SDATA
AOUTA+
Differential Output
Serial Clock
SCLK
VA
Analog Power
Left/Right Clock
LRCK
AGND
Analog Ground
Master Clock
MCLK
AOUTB+
Differential Output
See Description
M3
AOUTB-
Differential Output
See Description (SCL/CCLK) M2
BMUTEC
Channel B Mute Control
See Description (SDA/CDIN) M1
CMOUT
Common Mode Voltage
See Description
(AD0/CS) M0
FILT+
Positive Voltage Reference
1
2
3
4
20
19
18
17
5
6
7
8
16
15
14
13
9
10
12
11
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS4391-KZ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
| CS4391-KZZ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
| CS4392 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
| CS4392_04 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit, 192 kHz Stereo DAC with Volume Control |
| CS4392-KS | 功能描述:數(shù)模轉(zhuǎn)換器- DAC IC 114dB 192kHz Stereo DAC w/DSD RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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