參數(shù)資料
型號: CS4354-CSZ
廠商: Cirrus Logic Inc
文件頁數(shù): 11/24頁
文件大?。?/td> 0K
描述: IC DAC 24BIT SRL 14SOIC
特色產(chǎn)品: CS4354 Stereo D/A Converter
標準包裝: 48
位數(shù): 24
數(shù)據(jù)接口: 串行
轉換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 65mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 14-SOIC
包裝: 管件
輸出數(shù)目和類型: 2 電壓,單極
采樣率(每秒): 192k
產(chǎn)品目錄頁面: 757 (CN2011-ZH PDF)
其它名稱: 598-1808
CS4354-CSZ-ND
DS895F2
19
CS4354
shows the recommended power arrangements with VA and VL connected to clean supplies. It is strongly
recommended that a single ground plane be used with the GND pins connected to the common plane; this
is important because both pin 6 and pin 10 provide analog ground reference to the CS4354. Should it be
necessary to split the ground planes, the CS4354 should be placed entirely in the analog plane. In this con-
figuration, it is critical that the digital and analog ground planes be tied together with a low-impedance con-
nection, ideally a strip of copper on the printed circuit board, at a single point near the CS4354.
All signals, especially clocks, should be kept away from the FILT+ pin in order to avoid unwanted coupling
into the DAC.
4.10.1
Capacitor Placement
Decoupling capacitors should be placed as close to the device as possible, with the low-value ceramic
capacitor being the closest. To further minimize impedance, these capacitors should be located on the
same PCB layer as the device. See DC Electrical Characteristics for the voltage present across pin pairs.
This is useful for choosing appropriate capacitor voltage ratings and orientation if electrolytic capacitors
are used.
The CDB4354 evaluation board demonstrates the optimum layout and power supply arrangements.
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