參數(shù)資料
型號(hào)： CS4352-DZZR
廠商： Cirrus Logic Inc
文件頁(yè)數(shù)： 3/20頁(yè)
文件大?。?/td> 0K
描述： IC DAC STER 102DB 192KHZ 20TSSOP
標(biāo)準(zhǔn)包裝： 4,000
位數(shù)： 24
數(shù)據(jù)接口： 串行
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
功率耗散（最大）： 158mW
工作溫度： -40°C ~ 105°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 20-TSSOP
包裝： 帶卷 (TR)
輸出數(shù)目和類型： 2 電壓，單極
采樣率（每秒）： 192k
配用： 598-1518-ND - BOARD EVAL FOR CS4352 DAC
DS684F2
11
CS4352
4. APPLICATIONS
4.1
Sample Rate Range/Operational Mode Detect
The device operates in one of three operational modes. The allowed sample rate range in each mode is
auto-detected.
The CS4352 will auto-detect the correct mode when the input sample rate (Fs), defined by the LRCK fre-
quency, falls within one of the ranges illustrated in Table 1. Sample rates outside the specified range for
each mode are not supported.
Table 1. CS4352 Auto-Detect
4.2
System Clocking
The device requires external generation of the master (MCLK), left/right (LRCK) and serial (SCLK) clocks.
The left/right clock, defined also as the input sample rate (Fs), must be synchronously derived from the
MCLK according to specified ratios. The specified ratios of MCLK to LRCK, along with several standard au-
dio sample rates and the required MCLK frequency, are illustrated in Tables 2-4.
Refer to Section 4.3 for the required SCLK timing associated with the selected Digital Interface Format and
to “Switching Specifications - Serial Audio Interface” on page 8 for the maximum allowed clock frequencies.
Table 2. Single-Speed Mode Standard Frequencies
Table 3. Double-Speed Mode Standard Frequencies
Table 4. Quad-Speed Mode Standard Frequencies
Input Sample Rate (FS)
Mode
4 kHz - 54 kHz
Single-Speed Mode
84 kHz - 108 kHz
Double-Speed Mode
170 kHz - 216 kHz
Quad-Speed Mode
Sample Rate
(kHz)
MCLK (MHz)
256x
384x
512x
768x
1024x
32
8.1920
12.2880
16.3840
24.5760
32.7680
44.1
11.2896
16.9344
22.5792
33.8688
45.1584
48
12.2880
18.4320
24.5760
36.8640
49.1520
Sample Rate
(kHz)
MCLK (MHz)
128x
192x
256x
384x
512x
88.2
11.2896
16.9344
22.5792
33.8688
45.1584
96
12.2880
18.4320
24.5760
36.8640
49.1520
Sample Rate
(kHz)
MCLK (MHz)
128x
192x
256x
176.4
22.5792
33.8688
45.1584
192
24.5760
36.8640
49.1520
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