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參數(shù)資料
| 型號： | CRD44600-PH-FB |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | EVAL BOARD FOR CS44600 |
| 標準包裝： | 1 |
| 放大器類型： | D 類 |
| 輸出類型： | 2 通道（立體聲） |
| 在某負載時最大輸出功率 x 通道數(shù)量： | 100W x 2 @ 8 歐姆 |
| 電源電壓： | 35 V ~ 50 V |
| 工作溫度： | -10°C ~ 70°C |
| 板類型： | 完全填充 |
| 已用 IC / 零件： | CS44600 |
| 已供物品： | 板，軟件 |
| 產(chǎn)品目錄頁面： | 758 (CN2011-ZH PDF) |
| 相關產(chǎn)品： | 598-1068-5-ND - IC AMP CTLR DGTL 6CH 64LQFP |
| 其它名稱： | 598-1023 |
Micrel, Inc.
SM802128
January 2012
6
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(4, 5)
VDD = VDDO1/2 = 3.3V ±5% or 2.5V ±5%
VDD = 3.3V ±5%, VDDO1/2 = 3.3V ±5% or 2.5V ±5%
TA = 40°C to +85°C. RL = 50 to VDDO 2V
Symbol
Parameter
Condition
Min
Typ
Max
Units
FOUT1
Output Frequency 1
FSEL = 1
156.25
MHz
FOUT2
Output Frequency 2
FSEL = 0
312.5
MHz
FREF
Reference Input Frequency
25
MHz
TR/TF
ODC
LVPECL Output Rise/Fall Time
Output Duty Cycle
20% – 80%
80
175
350
ps
48
50
52
%
TSKEW
Output-to-Output Skew
Q1 – Q8
(6)
45
ps
TLOCK
PLL Lock Time
20
ms
Tjit()
RMS Phase Jitter
(7)
156.25MHz
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
312.5MHz
Integration Range (1.875MHz – 20MHz)
Integration Range (12kHz – 20MHz)
110
250
110
250
fs
Spurious Noise Components
6.25MHz using 156.25MHz
12.5MHz using 312.5MHz
-80
-85
dBc
Notes:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
2.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
4.
The circuit is designed to meet the AC and DC specifications shown in the above table after thermal equilibrium has been established.
5.
All phase
noise measurements were taken with an Agilent 5052B phasenoise system.
6.
Defined as skew between outputs at the same supply voltage and with equal load conditions and same frequency; measured at the output
differential crossing points.
7.
Measured using a 25MHz crystal as the input reference source. If using an external reference input, use a low phase noise source. With an
external reference, the phase noise will follow the input source phase noise up to about 1MHz offset frequency.
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