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| 型號(hào)： | CR16HCT9VJE7Y |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁(yè)數(shù)： | 29/157頁(yè) |
| 文件大?。?/td> | 1256K |
| 代理商： | CR16HCT9VJE7Y |
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however, the even numbered bytes of the high endurance
flash EEPROM data memory (F000 to F07E) and the ISP
flash EEPROM program memory (E000 to E5FE) can be
erased.
Read/write is overridden through PADX.
E5FC Byte
Upon reset of the chip, E5FC is read into the FLCTRL2 reg-
ister. The byte at E5FC is written in the ISP or test environ-
ments, or in the IRE environment through a byte-write
instruction when the write instruction is anywhere within the
user boot ROM area except for the last two words. When the
user boot ROM area has been disabled by having a value of
7F
16
in BOOTAREA, this word cannot be programmed in the
IRE environment. Note that when this word is erased for re-
programming, the other words in the same page must first be
saved, and then re-programmed also. The E5FC register for-
mat is shown below:
7
CODEAREA[7:0]
This byte contains the lowest 8 bits of the CODEAREA field.
When appended to the left with the lowest 2 bits in the ad-
dress E5FE, it forms the complete CODEAREA field, which
provides write protection to all or part of the program memo-
ry, see Figure 3. When write security is not enabled and
CODEAREA does not contain the value 3FF
16
, the program
memory range from (CODEAREA￥128) to 1FFFF is consid-
ered as protected user code area and cannot be written. The
minimum protected memory range is therefore 256 bytes
when CODEAREA contains the value 3FE. Note that the
C000-FFFF memory range is not considered as program
memory and is not protected by CODEAREA.
Figure 3.
Memory Protection through CODEAREA
When CODEAREA contains the value 3FF
16
, write protec-
tion is disabled. When the user code area overlaps into the
user boot ROM area, the overlap area is governed by a more
restrictive write protection feature, which is the user boot
ROM area. When write security has been enabled, the entire
program memory area is already write protected in all envi-
ronments.
Note that when a new value is written into CODEAREA, write
protection controlled by CODEAREA is updated after the
next device reset.
E5FD Byte
Upon the reset of the chip, the byte located at the E5FD ad-
dress is read into the FLCTRL1 register. This byte can only
be written in the ISP or test environments but not in the IRE
environment. If this byte is erased for re-programming, the
user must first save the other bytes in the same page, and
then re-program those bytes. The format of the E5FD byte is
shown below:
7
6
Reserved
BOOTAREA provides write protection to part of the program
memory, see Figure 4. When the write security feature is not
enabled and BOOTAREA does not contain the value 7F
16
,
then the program memory range from 0 to (BOOTAR-
EA*128)+127 is considered as user boot ROM area and can-
not be written to. The maximum protected memory range is
therefore 16K-127 bytes when BOOTAREA contains the val-
ue 7E
16
.
Figure 4.
Memory Protection through BOOTAREA
When BOOTAREA contains the value 7F
16
, write protection
is disabled. When write security has been enabled, the entire
program memory area is already write protected in all envi-
ronments.
Note that when a new value is written into BOOTAREA, write
protection controlled by BOOTAREA is updated after the
next device reset.
9.4.6
The ISP flash EEPROM program memory test mode allows
direct access to the flash memory from the device pins, and
bypasses the CR16B core. This test mode also accesses the
flash memory cells that are not used in data memory (three
out of four bytes in each page).
Test Mode
9.4.7
Flash Program Memory Control Register 1
(FLCTRL1)
The FLCTRL1 register is a read-only byte-wide register. The
value of this register is loaded from memory address E5FD
16
when the chip comes out of reset. The BOOTAREA field de-
fines a user boot ROM area to be write protected. The Flash
EEPROM Program Memory Control Register 1 format is
shown below:
7
6
Reserved
0
0000h
10000h
1FFFFh
Address Map
CR16MHR6
CODEAREA
×
128
protected
code area
user
C000h
non-code area, not
protected
protected
code area
user
0
BOOTAREA
0
BOOTAREA
0000h
3F80h
1FFFFh
Address Map
CR16MHR6
(BOOTAREA
×
128)+127
protected user boot
area
boot area maximum limit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CR16HCT9VJE8 | Microcontroller |
| CR16HCT9VJE8Y | Microcontroller |
| CR16HCT9VJE9 | Microcontroller |
| CR16HCT9VJE9Y | Microcontroller |
| CR16MCT5VJE8Y | Microcontroller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CR16HCT9VJE8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT9VJE8Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT9VJE9 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT9VJE9Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| CR16HCT9VJEX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5 16-Bit Reprogrammable/ROM Microcontroller |
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