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參數(shù)資料
| 型號(hào)： | CPS1087 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 22/64頁 |
| 文件大?。?/td> | 870K |
| 代理商： | CPS1087 |
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CSP1027 Voice Band Codec for
Cellular Handset and Modem Applications
Data Sheet
January 2002
Agere Systems Inc.
22
4 Architectural Information
(continued)
Figure 23. Active Communication and Connections
4.6.5 Active I/O Configuration (SMODE[1:0] = 01)
The active SIO configuration causes the CSP1027 to
generate an active input/output load (SYNC) to perform
input/output transmissions when needed. The user
supplies only a serial input/output clock (IOCK).
The active SIO is selected by setting SMODE1 low and
SMODE0 high. The input/output clock (IOCK) is an
input and the input/output load (SYNC) is an output.
While the codec is inactive, ACTIVE = 0 (see Table 7
on page 26), SYNC generates serial I/O transfers at an
IOCK ÷ 16 rate to allow loading the codec control regis-
ters,
cioc
[0:3]. While the codec is active, ACTIVE = 1
(see Table 7 on page 26), SYNC generates serial I/O
transfers at the sampling rate, synchronized to the
codec's emptying of the
cdx(D/A)
and loading of the
cdx(A/D)
. The serial address (SADD) functions as
described previously for the passive SIO configuration,
but with the SYNC pin being active and determining
data transfers, the need for polling the codec STATUS
flag is eliminated. The serial address during the data
stream still is used to determine whether data in the
input shift register is latched into
cdx(D/A)
or
cioc
[0:3]
at the end of the transaction. Note that
cioc0
, with
ACTIVE = 1, should be written last since this will
change the rate of serial I/O transfers from IOCK ÷ 16
to the sampling rate.
An example of the active SIO configuration is shown in
Figure 23. The DSP supplies the serial clock (IOCK)
while the CSP1027 supplies the input/output load,
SYNC. The serial address (SADD) is connected so that
writing the DSP's
srta
register addresses the
cdx(D/A)
when
srta
= 0x0, or the
cioc0
,
cioc1
,
cioc2
,
cioc3
when
srta
= 0x1. The DSP can activate the codec by
writing the
cioc0
register in the CSP1027, and then let-
ting its input buffer full flag (IBF) indicate when the
CSP1027 has transferred data. This is the preferred
interface for a single DSP and a CSP1027.
A/D DATA
CLOCK
CONTROL/DATA ADDRESS
INPUT/OUTPUT LOAD
D
I
I
O
D
O
D
I
S
S
D
DSP
CSP1027
SMODE0
SMODE1
SMODE2
D/A DATA
V
DD
S
5-7591 (F)
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|---|---|
| CPS1087A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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