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參數(shù)資料
| 型號： | CPC7584BA |
| 廠商： | CLARE INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 320K |
| 代理商： | CPC7584BA |
CPC7584
Rev. B
www.clare.com
11
Preliminar
y
apply logic input to the pins. This has the effect of
overriding the logic inputs and forcing the device to the
all-off state. Hold this input state for 25 ms. During this
hold period, toggle the inputs from the ringing state
(10) to the idle/talk state (00). After the 25 ms, release
pin 7 (TSD) to return the switch control to the input
pins 9 and 10 and reset the device to the idle/talk
state.
Setting TSD to +5 V allows switch control using the
logic pins 9 and 10. This setting, however, also
disables the thermal shutdown circuit and is therefore
not recommended. When using logic controls via the
input pins 9 and 10, pin 7 (TSD) should be allowed to
float. As a result, the two recommended states when
using pin 7 (TSD) as a control are 0, which forces the
device to the all-off state, or float, which allows logic
inputs to pins 9 and 10 to remain active. This may
require the use of an open-collector buffer.
2.2.1 Make-Before-Break Operation (Ringing to Talk Transition)
2.2.2 Break-Before-Make Operation (Ringing to Talk Transition)
2.2.3 Alternate Break-Before-Make Operation
Break-before-make operation can also be achieved
using TSD as an input. In lines 2 and 3 of
Transition)” on page 11, instead of using the logic
input pins to force the all-off state, force TSD to
ground. This overrides the logic inputs and also forces
the all off state. Hold this state for 25 ms. During this
25 ms all-off state, toggle the inputs from the ringing
state (Ring = 5 V, Test-In = 0 V) to the idle/talk state
(Ring = 0 V, Test-In=0 V). After 25 ms, release TSD to
return switch control to the input pins which will set the
idle talk state.
When using the CPC7584 in this mode, forcing TSD to
ground overrides the input pins and force an all off
state. Setting TSD to +5 V allows switch control via the
logic input pins. However, setting TSD to +5 V also
disables the thermal shutdown mechanism. This is not
recommended. Therefore, to allow switch control via
the logic input pins, allow TSD to float.
When using TSD as an input, the two recommended
states are 0 (overrides logic input pins and forces all
off state) and float (allows switch control via logic input
pins and the thermal shutdown mechanism is active).
This may require use of an open-collector buffer.
State
INRINGING
INTEST
TSD
Timing
Break
Switches
Ringing
Return
Switch
(SW3)
Ringing
Switch
(SW4)
Test
Switches
Ringing
1
0
Floating
-
Open
Closed
Open
Make-
before-
break
0
Floating
SW4 waiting for next zero-current crossing
to turn off. Maximum time is one-half of
ringing. In this transition state, current that is
limited to the dc break switch current limit
value will be sourced from the ring node of
the SLIC.
Closed
Open
Closed
Open
Talk
0
Floating
Zero-cross current has occurred
Closed
Open
State
INRINGING
INTEST
TSD
Timing
Break
Switches
Ringing
Return
Switch
(SW3)
Ringing
Switch
(SW4)
Test
Switches
Ringing
1
0
Floating
-
Open
Closed
Open
All-off
1
Floating
Hold this state for at least 25 ms. SW4
waiting for zero current to turn off.
Open
Closed
Open
SW4 has opened.
Open
Talk
0
Floating
Close Break Switches
Closed
Open
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| CPC7584BCTR | 功能描述:SWITCH LINE CARD ACCESS 16-SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 電信 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS 產(chǎn)品變化通告:Product Discontinuation 06/Feb/2012 標(biāo)準(zhǔn)包裝:750 系列:* |
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