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參數(shù)資料
| 型號： | CPC7583ZATR |
| 廠商： | CLARE INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO20 |
| 封裝： | ROHS COMPLIANT, SOIC-20 |
| 文件頁數(shù)： | 17/21頁 |
| 文件大?。?/td> | 618K |
| 代理商： | CPC7583ZATR |
CPC7583
R06
www.clare.com
5
1.6 Switch Specifications
1.6.1 Break Switches, SW1 and SW2
Parameter
Test Conditions
Symbol
Minimum
Typical
Maximum
Unit
Off-state leakage current
+25° C
VSW (differential) = -320 V to gnd
VSW (differential) = +260 V to -60 V
ISW
-
0.1
1
μA
+85° C
VSW (differential) = -330 V to gnd
VSW (differential) = +270 V to -60 V
0.3
-40° C
VSW (differential) = -310 V to gnd
VSW (differential) = +250 V to -60 V
0.1
RON
+25° C
ISW(on) = ±10 mA, ±40 mA,
RBAT and TBAT = -2 V
RON
-
14.5
-
Ω
+85° C
20.5
28
-40° C
10.5
-
RON match
Per on-resistance test condition of SW1
& SW2
ΔR
ON
0.15
0.8
DC current limit
+25° C
VSW (on) = ±10 V
ISW
-
225
-
mA
+85° C
80
150
-40° C
-
400
425
Dynamic current limit
(t
≤ 0.5 μs)
Break switches on, ringing switches off,
apply ±1 kV 10x1000
μs pulse, with
appropriate protection in place.
-2.5
-
A
Logic input to switch output isolation
+25° C
VSW (TLINE, RLINE) = ±320 V, logic
inputs = gnd
ISW
-0.1
1
μA
+85° C
VSW (TLINE, RLINE) = ±330 V, logic
inputs = gnd
-0.3
-40° C
VSW (TLINE, RLINE) = ±310 V, logic
inputs = gnd
-0.1
dv/dt sensitivity
-
200
-
V/
μs
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