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參數(shù)資料
| 型號(hào)： | CPC5611ATR |
| 廠商： | CLARE INC |
| 元件分類： | 調(diào)制器/解調(diào)器 |
| 中文描述： | MODEM-SUPPORT CIRCUIT, PDSO32 |
| 封裝： | PLASTIC, SOIC-32 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大?。?/td> | 743K |
| 代理商： | CPC5611ATR |
CPC5610/CPC5611
Rev. 9.0
www.clare.com
11
typical operation. The ring detection threshold can be
changed according to the following formula:
Clare Application Note AN-117 Customize Caller ID Gain
and Ring Detect Voltage Threshold is a spreadsheet for
trying different component values in this circuit.
Changing the ring detection threshold will also change
the caller ID gain and the timing of the polarity reversal
detection pulse, if used.
3.2.2 Polarity Reversal Detection with
CPC5611
The full-wave ring detector in the CPC5611 makes it
possible to detect tip and ring polarity reversal using
the RING output. When the polarity of tip and ring
reverses, a pulse on RING indicates the event. Your
host system must be able to discriminate this single
pulse of approximately 1 msec (using the recom-
mended snoop circuit external components) from a
valid ringing signal.
3.2.3 On-hook Caller ID Signal Processing
On-hook caller ID (CID) signals are processed by
LITELINK by coupling the CID data burst through the
snoop circuit to the LITELINK RX outputs under con-
trol of the CID pin. In North America, CID data signals
are typically sent between the first and second ringing
signal.
Figure 5. On-hook Caller ID Signal Timing in
North America for CPC5610 (with Half-
wave Ring Detect)
In North American applications, follow these steps to
receive on-hook caller ID data via the LITELINK RX
outputs:
1.
Detect the first ringing signal outputs on RING.
2.
Assert CID low.
3.
Process the CID data from the RX outputs.
4.
De-assert CID (high or floating).
Note: Taking LITELINK off-hook (via the OH pin) dis-
connects the snoop path from both the receive outputs
and the RING output, regardless of the state of the
CID pin.
CID gain from tip and ring to RX+ and RX- is deter-
mined by:
where
is the frequency of the CID data signal.
The recommended components in the application cir-
cuit yield a gain 0.27 dB at 200 Hz. Clare Application
Note AN-117 Customize Caller ID Gain and Ring Detect
Voltage Threshold is a spreadsheet for trying different
component values in this circuit. Changing the CID
gain will also change the ring detection threshold and
the timing of the polarity reversal detection pulse, if
used.
For single-ended snoop circuit output of 0 dBm, set
the total resistance across the series resistors (R6/
R44 and R7/R45) to 1.4 M
.
3.3 Off-Hook Operation
3.3.1 Receive Signal Path
Signals to and from the telephone network appear on
the tip and ring connections of the application circuit.
Receive signals are extracted from transmit signals by
the LITELINK two-wire to four-wire hybrid. Next, the
receive signal is converted to infrared light by the
receive photodiode amplifier and receive path LED.
The intensity of the light is modulated by the receive
signal and coupled across the electrical isolation bar-
rier by a reflective dome.
On the host equipment side of the barrier, the receive
signal is converted by a photodiode into a photocur-
VRINGPK
750mV
R3
-----------------
2R6 R3
+
()
2
1
πfRINGC7
()
2
-------------------------------
+
=
Caller ID data
RING
CID
First Ring
Signal levels not to scale
Second Ring
2s
500 ms
3s
475 ms
2s
GAINCID dB
()
20
6R3
2R6 R3
+
()
2
1
πfC7
()
2
-------------------
+
-----------------------------------------------------------------
log
=
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| CPC5620 | 制造商:CLARE 制造商全稱:Clare, Inc. 功能描述:LITELINK III Phone Line Interface IC (DAA) |
| CPC5620_1 | 制造商:CLARE 制造商全稱:Clare, Inc. 功能描述:LITELINK? III Phone Line Interface IC (DAA) |
| CPC5620A | 功能描述:固態(tài)繼電器-PCB安裝 LITELINK III, Half-wave Ring Detect RoHS:否 制造商:Omron Electronics 控制電壓范圍: 負(fù)載電壓額定值:40 V 負(fù)載電流額定值:120 mA 觸點(diǎn)形式:1 Form A (SPST-NO) 輸出設(shè)備:MOSFET 封裝 / 箱體:USOP-4 安裝風(fēng)格:SMD/SMT |
| CPC5620ATR | 功能描述:固態(tài)繼電器-PCB安裝 LITELINK III, Half-wave Ring Detect, T/R RoHS:否 制造商:Omron Electronics 控制電壓范圍: 負(fù)載電壓額定值:40 V 負(fù)載電流額定值:120 mA 觸點(diǎn)形式:1 Form A (SPST-NO) 輸出設(shè)備:MOSFET 封裝 / 箱體:USOP-4 安裝風(fēng)格:SMD/SMT |
| CPC5621 | 制造商:CLARE 制造商全稱:Clare, Inc. 功能描述:LITELINK? III Phone Line Interface IC (DAA) |
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