參數(shù)資料
型號: CP2105-F01-GM
廠商: SILICON LABORATORIES
元件分類: 總線控制器
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, QCC24
封裝: 4 X 4 MM, ROHS COMPLIANT, MO-220WGGD, QFN-24
文件頁數(shù): 10/24頁
文件大小: 201K
代理商: CP2105-F01-GM
CP2105
18
Rev. 1.0
10. Voltage Regulator
The CP2105 includes an on-chip 5 to 3.45 V voltage regulator. This allows the CP2105 to be configured as either a
USB bus-powered device or a USB self-powered device. A typical connection diagram of the device in a bus-
powered application using the regulator is shown in Figure 8. When enabled, the voltage regulator output appears
on the VDD pin and can be used to power external devices. See Table 5 for the voltage regulator electrical
characteristics. If it is desired to use the regulator to provide VDD in a self-powered application, the same
connections from Figure 8 can be used, but connect REGIN to an on-board 5 V supply, and disconnect it from the
VBUS pin.
Figure 8. Typical Bus-Powered Connection Diagram
Note 3
Note 2
Note 1
VBUS
D+
D-
GND
USB
Connector
Enhanced
UART
and GPIO
Signals
Standard
UART
and GPIO
Signals
CP2105
RXD_ECI
TXD_ECI
RXD_SCI
TXD_SCI
RTS_ECI
CTS_ECI
GPIO0_ECI / DTR_ECI
GPIO.1_ECI / DSR_ECI
SUSPEND / RI_ECI
NC / DCD_ECI / VPP
RTS_SCI
CTS_SCI
GPIO.1_SCI / DTR_SCI
GPIO.2_SCI / DSR_SCI
SUSPEND / RI_SCI
GPIO.0_SCI / DCD_SCI
REGIN
VDD
GND
VIO
VBUS
D+
D-
RST
1
F
1-5
F
0.1
F
3.45 V Power
VIO
4.7 k
Note 4
Note 1 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
Note 2 : An external pull-up is not required, but can be added for noise immunity.
Note 3 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
voltage.
Note 4 : If configuration ROM is to be programmed via USB, a 4.7
F capacitor must be added
between NC / DCD_ECI / VPP and ground. During a programming operation, the pin should
not be connected to other circuitry, and VDD must be at least 3.3 V.
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