參數(shù)資料
型號(hào)： COP8SBR9IMT8
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 微控制器/微處理器
英文描述： 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
中文描述： 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PDSO48
封裝： TSSOP-48
文件頁數(shù)： 35/80頁
文件大?。?/td> 972K
代理商： COP8SBR9IMT8
12.0 Timers
(Continued)
Note: Documentation for previous COP8 devices, which in-
cluded the Programmable Idle Timer, recommended the user
write zero to the high order bits of the ITMR Register. If
existing programs are updated to use this device, writing
zero to these bits will cause the device to reset (see
13.0
Power Saving Features
).
RSVD:
This bit is reserved and must be set to 0.
ITSEL2:0:
Selects the Idle Timer period as described in
Table 14, Idle Timer Window Length.
Any time the IDLE Timer period is changed there is the
possibility of generating a spurious IDLE Timer interrupt by
setting the T0PND bit. The user is advised to disable IDLE
Timer interrupts prior to changing the value of the ITSEL bits
of the ITMR Register and then clear the T0PND bit before
attempting to synchronize operation to the IDLE Timer.
12.2 TIMER T1, TIMER T2, AND TIMER T3
The device has a set of three powerful timer/counter blocks,
T1, T2, and T3. Since T1, T2 and T3 are identical, except for
the high speed operation of T2 and T3, all comments are
equally applicable to any of the three timer blocks which will
be referred to as Tx. Differences between the timers will be
specifically noted.
Each timer block consists of a 16-bit timer, Tx, and two
supporting 16-bit autoreload/capture registers, RxA and
RxB. Each timer block has two pins associated with it, TxA
and TxB. The pin TxA supports I/O required by the timer
block, while the pin TxB is an input to the timer block. The
timer block has three operating modes: Processor Indepen-
dent PWM mode, External Event Counter mode, and Input
Capture mode.
The control bits TxC3, TxC2, and TxC1 allow selection of the
different modes of operation.
12.2.1 Timer Operating Speeds
Each of the Tx timers, except T1, have the ability to operate
at either the instruction cycle frequency (low speed) or the
internal clock frequency (MCLK). For 10 MHz CKI, the in-
struction cycle frequency is 2 MHz and the internal clock
frequency is 20 MHz. This feature is controlled by the High
Speed Timer Control Register, HSTCR. Its format is shown
below. To place a timer, Tx, in high speed mode, set the
appropriate TxHS bit to 1. For low speed operation, clear the
appropriate TxHS bit to 0. This register is cleared to 00 on
Reset.
HSTCR
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit
1
Bit
0
0
0
0
0
0
0
T3HS
T2HS
12.2.2 Mode 1. Processor Independent PWM Mode
One of the timer’s operating modes is the Processor Inde-
pendent PWM mode. In this mode, the timers generate a
“Processor Independent” PWM signal because once the
timer is set up, no more action is required from the CPU
which translates to less software overhead and greater
throughput. The user software services the timer block only
when the PWM parameters require updating. This capability
is provided by the fact that the timer has two separate 16-bit
reload registers. One of the reload registers contains the
“ON” time while the other holds the “OFF” time. By contrast,
a microcontroller that has only a single reload register re-
quires an additional software to update the reload value
(alternate between the on-time/off-time).
The timer can generate the PWM output with the width and
duty cycle controlled by the values stored in the reload
registers. The reload registers control the countdown values
and the reload values are automatically written into the timer
when it counts down through 0, generating interrupt on each
reload. Under software control and with minimal overhead,
the PWM outputs are useful in controlling motors, triacs, the
intensity of displays, and in providing inputs for data acqui-
sition and sine wave generators.
In this mode, the timer Tx counts down at a fixed rate of t
C
(T2 and T3 may be selected to operate from MCLK). Upon
every underflow the timer is alternately reloaded with the
contents of supporting registers, RxA and RxB. The very first
underflow of the timer causes the timer to reload from the
register RxA. Subsequent underflows cause the timer to be
reloaded from the registers alternately beginning with the
register RxB.
Figure 16
shows a block diagram of the timer in PWM mode.
The underflows can be programmed to toggle the TxAoutput
pin. The underflows can also be programmed to generate
interrupts.
Underflows from the timer are alternately latched into two
pending flags, TxPNDA and TxPNDB. The user must reset
these pending flags under software control. Two control
enable flags, TxENA and TxENB, allow the interrupts from
the timer underflow to be enabled or disabled. Setting the
timer enable flag TxENA will cause an interrupt when a timer
underflow causes the RxA register to be reloaded into the
timer. Setting the timer enable flag TxENB will cause an
interrupt when a timer underflow causes the RxB register to
be reloaded into the timer. Resetting the timer enable flags
will disable the associated interrupts.
Either or both of the timer underflow interrupts may be
enabled. This gives the user the flexibility of interrupting
once per PWM period on either the rising or falling edge of
the PWM output. Alternatively, the user may choose to inter-
rupt on both edges of the PWM output.
10138919
FIGURE 16. Timer in PWM Mode
C
www.national.com
35
相關(guān)PDF資料
PDF描述
COP8SCR9IMT8 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
COP8SDR9IMTA8 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
COP8SCR9HLQ7 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
COP8SDR9HLQ7 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
COP8SCR9LVA7 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
COP8SBR9KMT8 功能描述:IC MCU EEPROM 8BIT 32K 56-TSSOP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:COP8™ 8S 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND
COP8SBR9LVA8 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
COP8SBR9LVA8/NOPB 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
COP8SBR9LVA8NOPB 制造商:National Semiconductor 功能描述:MCU 8-bit COP8 CISC 32KB Flash 3.3V/5V 68-Pin PLCC Rail
COP8SCE9 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*