參數(shù)資料
型號(hào)： COP8SAC5
廠商： National Semiconductor Corporation
英文描述： 8-Bit CMOS ROM Based and One-Time Programmable OTP Microcontroller with 1k to 4k Memory, Power On Reset, and Very Small Packaging
中文描述： 8位的CMOS基于ROM和一次性可編程微控制器經(jīng)銷商檢察官到4K內(nèi)存，上電復(fù)位，以及超小型封裝
文件頁數(shù)： 39/60頁
文件大?。?/td> 787K
代理商： COP8SAC5
12.0 Memory Map
All RAM, ports and registers (except A and PC) are mapped into data memory address space.
RAM
Select
Address
ADD REG
02 to 2F
30 to 7F
00 to 6F
70 to 7F
80 to 93
94
95
96
97
A0 to C6
C7
C8
C9
CA
CB to CF
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DA
DB
DC
DD to DF
E0 to E5
E6
E7
E8
E9
EA
EB
EC
ED
EE
EF
F0 to FB
FC
FD
FE
FF
Contents
64 On-Chip RAM Bytes.
(COP8SAAx)
128 On-Chip RAM Bytes
(COP8SABx/SACx)
On-Chip RAM (48 Bytes)
Unused RAM (Reads as all ones)
On-Chip RAM (112 Bytes)
Unused RAM (Reads as all ones)
Reserved
Port F Data Register
Port F Configuration Register
Port F Input Pins (Read Only)
Reserved
Reserved
WATCHDOG Service Register (Reg: WDSVR)
MIWU Edge Select Register (Reg: WKEDG)
MIWU Enable Register (Reg: WKEN)
MIWU Pending Register (Reg: WKPND)
Reserved
Port L Data Register
Port L Configuration Register
Port L Input Pins (Read Only)
Reserved
Port G Data Register
Port G Configuration Register
Port G Input Pins (Read Only)
Reserved
Port C Data Register
Port C Configuration Register
Port C Input Pins (Read Only)
Reserved
Port D
Reserved
Reserved
Timer T1 Autoload Register T1RB Lower Byte
Timer T1 Autoload Register T1RB Upper Byte
ICNTRL Register
MICROWIRE/PLUS Shift Register
Timer T1 Lower Byte
Timer T1 Upper Byte
Timer T1 Autoload Register T1RA Lower Byte
Timer T1 Autoload Register T1RA Upper Byte
CNTRL Control Register
PSW Register
On-Chip RAM Mapped as Registers
X Register
SP Register
B Register
Reserved (Segment Register)
Reading any undefined memory location in the address range of 0080H–00FFH will return undefined data.
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