參數(shù)資料
型號: COP8SAA728N8
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: 8-Bit CMOS ROM Based and One-Time Programmable OTP Microcontroller with 1k to 4k Memory, Power On Reset, and Very Small Packaging
中文描述: 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PDIP28
封裝: DIP-28
文件頁數(shù): 44/60頁
文件大小: 787K
代理商: COP8SAA728N8
13.0 Instruction Set
(Continued)
13.6 INSTRUCTION SET SUMMARY
ADD
ADC
A,Meml
A,Meml
ADD
ADD with Carry
A
A + Meml
A
A + Meml + C, C
Carry,
HC
Half Carry
A
A MemI + C, C
Carry,
HC
Half Carry
A
A and Meml
Skip next if (A and Imm) = 0
A
A or Meml
A
A xor Meml
Compare MD and Imm, Do next if MD = Imm
Compare A and Meml, Do next if A = Meml
Compare A and Meml, Do next if A
Meml
Compare A and Meml, Do next if A
>
Meml
Do next if lower 4 bits of B
Imm
Reg
Reg 1, Skip if Reg = 0
1 to bit, Mem (bit = 0 to 7 immediate)
0 to bit, Mem
If bit
#
, A or Mem is true do next instruction
Reset Software Interrupt Pending Flag
A
Mem
A
[X]
A
Meml
A
[X]
B
Imm
Mem
Imm
Reg
Imm
A
[B], (B
B
±
1)
A
[X], (X
X
±
1)
A
[B], (B
B
±
1)
A
[X], (X
X
±
1)
[B]
Imm, (B
B
±
1)
A
0
A
A + 1
A
A 1
A
ROM (PU,A)
A
BCD correction of A (follows ADC, SUBC)
C
A7
A0
C
C
A7
A0
C, HC
A0
A7…A4
A3…A0
C
1, HC
1
C
0, HC
0
IF C is true, do next instruction
If C is not true, do next instruction
SP
SP + 1, A
[SP]
[SP]
A, SP
SP 1
PU
[VU], PL
[VL]
PC
ii (ii = 15 bits, 0 to 32k)
PC9…0
i (i = 12 bits)
PC
PC + r (r is 31 to +32, except 1)
SUBC
A,Meml
Subtract with Carry
AND
ANDSZ
OR
XOR
IFEQ
IFEQ
IFNE
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
RPND
X
X
LD
LD
LD
LD
LD
X
X
LD
LD
LD
CLR
INC
DEC
LAID
DCOR
RRC
RLC
SWAP
SC
RC
IFC
IFNC
POP
PUSH
VIS
JMPL
JMP
JP
A,Meml
A,Imm
A,Meml
A,Meml
MD,Imm
A,Meml
A,Meml
A,Meml
#
Reg
#
,Mem
#
,Mem
#
,Mem
Logical AND
Logical AND Immed., Skip if Zero
Logical OR
Logical EXclusive OR
IF EQual
IF EQual
IF Not Equal
IF Greater Than
If B Not Equal
Decrement Reg., Skip if Zero
Set BIT
Reset BIT
IF BIT
Reset PeNDing Flag
EXchange A with Memory
EXchange A with Memory [X]
LoaD A with Memory
LoaD A with Memory [X]
LoaD B with Immed.
LoaD Memory Immed.
LoaD Register Memory Immed.
EXchange A with Memory [B]
EXchange A with Memory [X]
LoaD A with Memory [B]
LoaD A with Memory [X]
LoaD Memory [B] Immed.
CLeaR A
INCrement A
DECrement A
Load A InDirect from ROM
Decimal CORrect A
Rotate A Right thru C
Rotate A Left thru C
SWAP nibbles of A
Set C
Reset C
IF C
IF Not C
POP the stack into A
PUSH A onto the stack
Vector to Interrupt Service Routine
Jump absolute Long
Jump absolute
Jump relative short
A,Mem
A,[X]
A,Meml
A,[X]
B,Imm
Mem,Imm
Reg,Imm
A, [B
±
]
A, [X
±
]
A, [B
±
]
A, [X
±
]
[B
±
],Imm
A
A
A
A
A
A
A
A
A
Addr.
Addr.
Disp.
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