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參數資料
| 型號： | CNW4506 |
| 英文描述： | Intelligent Power Module and Gate Drive Interface Optocouplers |
| 中文描述： | 智能功率模塊和門極驅動接口光電耦合器 |
| 文件頁數： | 8/14頁 |
| 文件大?。?/td> | 267K |
| 代理商： | CNW4506 |
1-56
Package Characteristics
Over recommended temperature (T
A
= -40
°
C to 100
°
C) unless otherwise specified.
Parameter
Sym.
Min. Typ.* Max. Units
Input-Output Momentary
V
ISO
2500
Withstand Voltage
5000
Test Conditions
RH < 50%,
HCPL-0466
HCNW4506
Option 020
HCNW4506
HCPL-4506
HCPL-0466
HCNW4506
HCPL-4506
HCPL-0466
HCNW4506
Fig.
Note
6, 7, 8
V rms HCPL-4506
t = 1 min.
T
A
= 25
°
C
6, 8, 13
5000
6, 8
6
Resistance
(Input-Output)
R
I-O
10
12
V
I-O
= 500 Vdc
10
12
10
13
0.6
Capacitance
(Input-Output)
C
I-O
pF
f = 1 MHz
6
0.5
*
All typical values at 25
°
C, V
CC
= 15 V.
The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if
applicable), your equipment level safety specification or HP Application Note 1074 entitled “Optocoupler Input-Output Endurance
Voltage,” publication number 5963-2203E.
Notes:
1. Derate linearly above 90
°
C free-air
temperature at a rate of 0.8 mA/
°
C.
2. Derate linearly above 90
°
C free-air
temperature at a rate of 1.6 mA/
°
C.
3. Derate linearly above 90
°
C free-air
temperature at a rate of 3.0 mW/
°
C.
4. Derate linearly above 90
°
C free-air
temperature at a rate of 4.2 mW/
°
C.
5. CURRENT TRANSFER RATIO in
percent is defined as the ratio of
output collector current (I
O
) to the
forward LED input current (I
F
) times
100.
6. Device considered a two-terminal
device: Pins 1, 2, 3, and 4 shorted
together and Pins 5, 6, 7, and 8
shorted together.
7. In accordance with UL 1577, each
optocoupler is proof tested by
applying an insulation test voltage
≥
3000 V rms for 1 second (leakage
detection current limit, I
I-O
≤
5
μ
A).
This test is performed before the
100% Production test shown in the
VDE 0884 Insulation Related
Characteristics Table, if applicable.
8. For option 020, in accordance with
UL 1577, each optocoupler is proof
tested by applying an insulation test
voltage
≥
6000 V rms for 1 second
(leakage detection current limit, I
I-O
≤
5
μ
A). This test is performed before
the 100% Production test for partial
discharge (method b) shown in the
VDE 0884 Insulation Related
Characteristics Table, if applicable.
9. Pulse: f = 20 kHz, Duty Cycle = 10%.
10. The internal 20 k
resistor can be
used by shorting pins 6 and 7
together.
11. Due to tolerance of the internal
resistor, and since propagation delay
is dependent on the load resistor
value, performance can be improved
by using an external 20 k
1% load
resistor. For more information on
how propagation delay varies with
load resistance, see Figure 12.
12. The R
L
= 20 k
, C
L
= 100 pF load
represents a typical IPM (Intelligent
Power Module) load.
13. See Option 020 data sheet for more
information.
14. Use of a 0.1
μ
F bypass capacitor
connected between pins 5 and 8 can
improve performance by filtering
power supply line noise.
15. The difference between t
PLH
and t
PHL
between any two devices under the
same test condition. (See IPM Dead
Time and Propagation Delay
Specifications section.)
16. Common mode transient immunity in
a Logic High level is the maximum
tolerable dV
CM
/dt of the common
mode pulse, V
CM
, to assure that the
output will remain in a Logic High
state (i.e., V
O
> 3.0 V).
17. Common mode transient immunity in
a Logic Low level is the maximum
tolerable dV
CM
/dt of the common
mode pulse, V
CM
, to assure that the
output will remain in a Logic Low
state (i.e., V
O
< 1.0 V).
18. Pulse Width Distortion (PWD) is
defined as |t
PHL
- t
PLH
| for any given
device.
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