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參數(shù)資料
| 型號： | CM3107-12SH |
| 廠商： | California Micro Devices Corporation |
| 英文描述： | 2 Amp Source/ Sink Bus Termination Regulator for DDR Memory and Front Side Bus Applications |
| 中文描述： | 2安培源/ DDR內(nèi)存和前端總線接收器總線終端穩(wěn)壓器的應(yīng)用 |
| 文件頁數(shù)： | 4/13頁 |
| 文件大小： | 1214K |
| 代理商： | CM3107-12SH |
2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
02/02/04
CM3107
Specifications (cont’d)
Note 1: Operating Characteristics are over Standard Operating Conditions unless otherwise specified.
ELECTRICAL OPERATING CHARACTERISTICS
(SEE NOTE 1)
SYMBOL
V
IN
PARAMETER
Input Voltage Range
V
DDQ
V
CC
V
CC
Quiescent Current
Output Voltage
CONDITIONS
MIN
TYP
MAX
UNITS
2.2
2.2
2.5
2.5
V
CC
5.5
V
V
I
CC
V
TT
I
VTT
= 0A
I
VTT
= 0A, V
DDQ
= 2.5V,
V
DDQ
SEL= logic "1" = 2.5V
V
DDQ
SEL= logic "0", FSBSEL= logic "0"
V
DDQ
SEL = logic "0", FSBSEL = logic "1"
450
μ
A
I
VTT
= 0A, V
DDQ
= 3.3V,
V
DDQ
SEL= logic "0", FSBSEL= logic "0"
V
DDQ
SEL = logic "0", FSBSEL = logic "1"
0A < I
VTT
< 2.0A or 0A < I
VTT
< -2.0A
V
DDQ
SEL = 2.5V, I
VREF
=0A
1.225
1.200
1.425
1.200
1.425
1.250
1.225
1.450
1.225
1.450
1.275
1.250
1.475
1.250
1.475
V
V
V
V
V
V
V
RLOAD
V
REF
VOS
VTT
Z
REF
Z
VDDQSEL
CL
VTT
V
FSBSEL
Load Regulation
6.25
mV
Output Reference Voltage
1.225
1.250
1.275
V
Output Offset from V
REF
V
REF
Output Impedance
V
VDDQSEL
Input Impedance
V
TT
Current Limit
Output Selection Logic
(FSBSEL)
Logic "1" Level
Logic "0" Level
Shutdown Temperature
Thermal Hysteresis
-20
20
mV
-5
μ
A < I
VREF
< 5
μ
A
5
k
100
k
2.5
A
1.5
0.4
V
V
T
DISABLE
T
HYST
150
50
°C
°C
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| CM3108F10SL-4 | 制造商:Lapp Group 功能描述:CLAMP R/ANGLE 10SL-4 |
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