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參數(shù)資料
| 型號(hào)： | CM3102-12ST |
| 廠商： | California Micro Devices Corporation |
| 英文描述： | Micropower 1.2V/150mA CMOS LDO Regulator with Power Good |
| 中文描述： | 微1.2V/150mA的CMOS LDO穩(wěn)壓器的電源良好 |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大小： | 236K |
| 代理商： | CM3102-12ST |
2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
L
Tel: 408.263.3214
L
Fax: 408.263.7846
L
www.calmicro.com
01/20/04
CM3102
Note 1: Operating Characteristics are over Standard Operating Conditions unless otherwise specified.
Timing Diagram
ELECTRICAL OPERATING CHARACTERISTICS
(SEE NOTE 1)
SYM-
BOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
OUT
Regulator Output Voltage
0.1mA < I
LOAD
< 150mA
1.1
1.2
1.3
V
V
R LOAD
Load Regulation
10mA < I
LOAD
< 150mA
30
mV
V
R LINE
Line Regulation
xx
I
LOAD
= 5mA; 2.7V < V
IN
< to 3.6V
20
mV
I
LIM
Overload Current Limit
160
350
mA
I
SC
Short Circuit Current Limit
V
OUT
< 0.5V
140
mA
R
DISCH
Discharge Resistance
EN tied to GND
500
μ
A
μ
A
μ
A
I
GND
Ground Current
Regulator Enabled (EN=V
IN
); I
LOAD
= 0mA
Regulator Enabled (EN=V
IN
); I
LOAD
= 150mA
Regulator Disabled (EN=GND); (Disable Mode)
90
100
0.01
200
250
10
V
EN
EN Input Logic High Threshold
Regulator Enabled
1.6
V
V
DIS
EN Input Logic Low Threshold
Regulator Disabled
0.4
V
I
EN
Enable Input Current
0.01
μ
A
V
PGL
Power Good Low Threshold
% of V
OUT
(PG ON)
89
%
V
PGH
Power Good High Threshold
% of V
OUT
(PG OFF)
I
L
=100
μ
A; Fault Condition
97
%
V
OL
Power Good Logic "0" Voltage
0.02
0.1
V
I
PG
Power Good Leakage Current
Power Good Off; V
PG
=5.5V
0.01
μ
A
PG
DELAY
Delay Time to Power Good
1
5
mS
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