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參數(shù)資料
| 型號： | CLVC1G125QDBVRQ1 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 1/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BUS BUFF TRI-ST N-INV SOT23-5 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | 74LVC |
| 邏輯類型： | 緩沖器/線路驅(qū)動器，非反相 |
| 元件數(shù)： | 1 |
| 每個(gè)元件的位元數(shù)： | 1 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SC-74A，SOT-753 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-5 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 981 (CN2011-ZH PDF) |
| 其它名稱： | 296-23463-6 |
1
FEATURES
See mechanical drawings for dimensions.
DBV PACKAGE
(TOP VIEW)
5
1
V
CC
OE
2
A
3
4
GND
Y
DCK PACKAGE
(TOP VIEW)
2
A
3
4
GND
V
CC
5
OE
Y
1
DESCRIPTION/ORDERING INFORMATION
www.ti.com........................................................................................................................................................... SGES002C – APRIL 2003 – REVISED APRIL 2008
SINGLE BUS BUFFER GATE
WITH 3-STATE OUTPUT
Qualified for Automotive Applications
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Supports 5-V V
CC Operation
ESD Protection Exceeds JESD 22
Inputs Accept Voltages to 5.5 V
–
2000-V Human-Body Model (A114-A)
Low Power Consumption, 10-A Max I
CC
–
200-V Machine Model (A115-A)
±24-mA Output Drive at 3.3 V
–
1000-V Charged-Device Model (C101)
I
off Supports Partial-Power-Down Mode
Operation
This bus buffer gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G125 is a single line driver with a 3-state output. The output is disabled when the output-enable
(OE) input is high.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(3)
SOT (SC-70) – DCK
Reel of 3000
1P1G125QDCKRQ1
CM_
–40
°C to 125°C
SOT (SOT-23) – DBV
Reel of 3000
CLVC1G125QDBVRQ1
C25_
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 2003–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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| CLVC1G175MDCKREP | 功能描述:觸發(fā)器 Mil Enhanced Single D-Type Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| CLVC1G175MDCKREPG4 | 功能描述:觸發(fā)器 EP Sgl D-Type Flip- Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| CLVC1G17MDCKREPG4 | 功能描述:緩沖器和線路驅(qū)動器 EP Sgl Schmitt- Trigger Buffer RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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