- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379898 > CLC5958SLB (NATIONAL SEMICONDUCTOR CORP) 14-bit, 52MSPS A/D Converter PDF資料下載
參數(shù)資料
| 型號： | CLC5958SLB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 14-bit, 52MSPS A/D Converter |
| 中文描述： | 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO48 |
| 封裝： | CSP-48 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大?。?/td> | 1614K |
| 代理商： | CLC5958SLB |
9
http://www.national.com
Routing Output Data Lines
It is recommended that the ground plane be removed
under the data output lines to minimize the capacitive
loading of these lines. In some systems this may not be
permissible because of EMI considerations.
Harmonics and Clock Spurious
Harmonics are created by non-linearity in the track-and-
hold and the quantizer. Harmonics that arise from
repetitive non-linearities in the quantizer may be reduced
by the application of a dither signal.
Transformers and baluns can contribute harmonic
distortion, particularly at low frequencies where trans-
former operation relies on magnetic flux in the core. If a
transformer is used to perform single-ended to differential
conversion at the input, care should be taken in the
selection of the transformer.
The clock is internally divided by the CLC5958 in order to
generate internal control signals. These divided clocks
can contribute spurious energy, principally at f
s
/4 and f
s
/8.
The clock spurious is typically less than -90dBFS.
Calibration Sidebands
The CLC5958 incorporates on-board calibration. The
calibration process creates low level sideband spurious
close to the carrier and near DC for some input
frequencies. In most applications these sidebands will
not be an issue. The sidebands add negligible power to
the carrier and therefore do not reduce sensitivity in
receiver applications. Also, the sidebands never fall in
adjacent channels with any appreciable power. They may
be visible in some very narrow-band applications, and so
are documented here for completeness.
The offset of the sidebands relative to the carrier and rel-
ative to DC is derived using the equations:
where f
is the sideband offset, f
in
is the input
frequency, f
s
is the sample rate, and round(
) denotes
integer rounding. The magnitude of the sideband relative
to the carrier for a full scale input tone is approximated by
the equations:
where a
is the sideband magnitude relative to the input,
and
α
is the calibration sideband coefficient. The value of
α
rolls off 2dB per dB as the input amplitude is reduced.
For example, assume the input frequency is 4.8671MHz
and the sample rate is 52MSPS. Then the sideband
offset is derived as follows:
If the input is a full scale input, then the magnitude of the
sidebands is derived as:
The sidebands roll off rapidly with increasing sideband
offset. For example, if the sideband is offset 200KHz from
the carrier (in an adjacent GSM channel) as opposed to
the 7.9KHz offset from the previous example, the side-
band magnitude is reduced to -116dBc.
Figure 4 shows how the sideband offset frequency
varies with input frequency at a sample rate of 52MSPS.
Figure 4: Sideband Offset vs. Input Frequency
The sideband magnitude is a function of the sideband
offset, as illustrated in Figure 5.
Figure 5: Sideband Magnitude vs. Sideband Offset
S
f
(KHz)
-80
-90
-120
0
100
200
300
400
500
600
800
-95
-100
-105
-110
-115
700
-85
n
round
32f
f
f
f
nf
32
in
s
in
s
=
=
x
1024
f
/ f
a
sin x
x
s
=
=
π
α
n
round
32 4.8671e
52e
3
f
4.8671e
3 52e
32
7.9KHz
6
6
6
6
=
=
=
=
x
1024
7.9e /52e
0.489
a
100e
sin .489
.489
96e
80dBc
6
-6
-6
=
=
=
)
=
=
π
f
Input Frequency (MHz)
800
700
0
0
5
25
600
500
200
100
10
15
20
400
300
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC5958PCASM | 14-bit, 52MSPS A/D Converter |
| CLC5958 | 14-bit, 52MSPS A/D Converter(14位52 MSPSA/D轉(zhuǎn)換器) |
| CLC935 | 12-bit, 15MSPS A/D Converter |
| CLC935B8C | 12-bit, 15MSPS A/D Converter |
| CLC935BC | 12-bit, 15MSPS A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC-60 | 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:60~240W Single Output with PFC |
| CLC7 | 制造商:Velleman Inc 功能描述: |
| CLC730027 | 功能描述:EVAL BOARD OP AMP 8-SOIC RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| CLC730031/NOPB | 功能描述:EVAL BOARD QUAD OP AMP 8-SOIC RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 傳感器類型:CMOS 成像，彩色（RGB） 傳感范圍:WVGA 接口:I²C 靈敏度:60 fps 電源電壓:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相關(guān)產(chǎn)品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| CLC730033 | 功能描述:EVAL BOARD AMP FOR 14-SOIC RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 運(yùn)算放大器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。