參數(shù)資料
型號(hào): CLC5956PCASM
廠商: National Semiconductor Corporation
英文描述: 12-bit, 65 MSPS Broadband Monolithic A/D Converter
中文描述: 12位,65 MSPS的寬帶單片A / D轉(zhuǎn)換
文件頁(yè)數(shù): 2/10頁(yè)
文件大小: 391K
代理商: CLC5956PCASM
Pin Configuration
Ordering Information
CLC5956IMTD
CLC5956IMTDX
CLC5956PCASM
48-Pin TSSOP
48-Pin TSSOP (Taped Reel)
Evaluation Board
Pin Descriptions
Pin
Name
Pin
No.
Description
A
IN
A
IN
13, 14
Differential input with a common mode voltage of +2.4V. The ADC
full scale input is 1.024 V
PP
on each of the complimentary input
signals.
Differential clock where ENCODE initiates a new data conversion
cycle on each rising edge. Logic for these inputs are a 50% duty
cycle differential PECL signal.
Internal common mode voltage reference. Nominally +2.4V. Can
be used for the input common mode voltage. This voltage is
derived from an internal bandgap reference.
Digital data outputs are CMOS and TTL compatible. D0 is the LSB
and D11 is the MSB. MSB is inverted. Output coding is two’s
complement.
ENCODE
ENCODE
9, 10
VCM
21
D0–D11
30–34,
39–45
GND
1–4, 8, 11, 12, 15, 19,
20, 23–26, 35, 36, 47, 48
Circuit ground.
+AV
CC
5–7, 16–18, 22
+5V power supply for the analog section. Bypass to ground with a
0.1 μF capacitor.
+5V power supply for the digital section. Bypass to ground with a
0.1 μF capacitor.
+DV
CC
37, 38, 46
DS015011-1
www.national.com
2
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PDF描述
CLC5956 12-bit, 65 MSPS Broadband Monolithic A/D Converter(12位65 MSPS寬帶單片A/D轉(zhuǎn)換器)
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CLC5956IMTDX 12-bit, 65 MSPS Broadband Monolithic A/D Converter
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