參數(shù)資料
型號(hào)： CLC5802IM
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 運(yùn)動(dòng)控制電子
英文描述： Dual Low-Noise, Voltage Feedback Op Amp
中文描述： DUAL OP-AMP, 3500 uV OFFSET-MAX, 120 MHz BAND WIDTH, PDSO8
封裝： SOIC-8
文件頁數(shù)： 3/12頁
文件大?。?/td> 420K
代理商： CLC5802IM
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Short Circuit Current
Common-Mode Input Voltage
Differential Input Voltage
Maximum Junction Temperature
±
7V
(Note 3)
±
V
CC
±
10V
+125C
Storage Temperature
Lead Temperature (soldering 10 sec)
65C to +150C
+300C
Operating Rating
(Note 1)
Thermal Resistance (
θ
JC
)
Thermal Resistance (
θ
JA
)
Temperature Range
Supply Voltage Range
40C/W
115C/W
40C to +85C
5V to 12V
Electrical Characteristics
(T
A
= +25C, V
CC
=
±
5V, A
V
= +2V/V, R
f
= 100
, R
g
= 100
, R
L
= 100
; unless specified).
Symbol
Parameter
Conditions
Typ
Min/Max Ratings
(Note 2)
0C to
+70C
Units
+25C
+25C
40C
to
+85C
Frequency Domain Response
GBW
Gain Bandwidth Product
SSBW
3dB Bandwidth (A
V
= +1)
3dB Bandwidth (A
V
= +2)
LSBW
3dB Bandwidth
GFP
Gain Flatness Peaking
V
OUT
<
0.5V
PP
V
OUT
<
0.5V
PP
V
OUT
<
0.5V
PP
V
OUT
<
5.0V
PP
DC to 200MHz, V
OUT
<
0.5
V
PP
DC to 20MHz, V
OUT
<
0.5
V
PP
DC to 20MHz
120
140
75
40
0.0
90
110
50
25
0.6
MHz
dB
GFR
Gain Flatness Rolloff
0.05
0.5
dB
LPD
Time Domain Response
TRS
Rise and Fall Time
TSS
Settling Time
OS
Overshoot
SR
Slew Rate
Distortion And Noise Response
HD2
2nd Harmonic Distortion
HD3
3rd Harmonic Distortion
VN
Equivalent Input Noise Voltage
Linear Phase Deviation
0.2
1.0
Deg
1V step
2V step to 0.1%
1V step
5V step
6
8
ns
ns
%
V/μs
18
1
450
22
5
275
1V
PP
, 5MHz
1V
PP
, 5MHz
1MHz to 100MHz
69
66
4.0
57
54
4.5
dBc
dBc
nV/
ICN
Equivalent Input Noise Current
1MHz to 100MHz
2.0
3.0
pA/
CT
Static, DC Performance
AOL
Open-Loop Gain
VIO
Input Offset Voltage (Note 4)
DVIO
Offset Voltage Average Drift
IB
Input Bias Current (Note 4)
DIB
Bias Current Average Drift
IIO
Input Offset Current
DIIO
Offset Current Average Drift
PSRR
Power Supply Rejection Ratio
CMRR
Common Mode Rejection Ratio
ICC
Supply Current (Note 4)
Crosstalk
Input referred, 10MHz
61
58
dB
DC
60
±
1.0
5
1.5
150
0.3
5
63
60
11
56
±
2.0
–
25
–
3
–
57
54
12
50
±
3.0
15
40
600
5
25
55
52
13
50
±
3.5
20
65
700
5
50
55
52
15
dB
mV
μV/C
μA
nA/C
μA
nA/C
dB
dB
mA
DC
DC
Per Channel, R
L
=
∞
C
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