參數(shù)資料
型號(hào): CLC5801IMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: High Speed Low Noise Voltage Feedback Amplifier
中文描述: OP-AMP, 1000 uV OFFSET-MAX, 1800 MHz BAND WIDTH, PDSO8
封裝: SOIC-8
文件頁(yè)數(shù): 3/14頁(yè)
文件大?。?/td> 462K
代理商: CLC5801IMX
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
CC
I
Short Circuit protected to
ground. Maximum reliability is
obtained if I
OUT
does not exceed:
Common-Mode Input Voltage
Maximum Junction Temperature
Storage Temperature Range
Lead Temperature (soldering 10 sec)
ESD (human body model)
Electrical Characteristics
(T
A
= 25C, V
CC
=
±
5V, R
g
= 26.1
, R
f
= 499
, R
L
= 100
; unless specified).
Symbol
Parameter
±
7V
125mA
±
V
CC
+125C
65C to +150C
+300C
1000V
Operating Rating
(Note 1)
Thermal Resistance (
θ
JC
)
SOIC
SOT23-5
Thermal Resistance (
θ
JA
)
SOIC
SOT23-5
Temperature Range
Recommended Gain Range
65C/W
115C/W
145C/W
185C/W
40C to +85C
±
10 to
±
1000V/V
Conditions
Typ
Min/Max Ratings
(Note 2)
40C
+25C
Units
+25C
+85C
Frequency Domain Response
GBW
Gain Bandwidth Product
SSBW
3dB Bandwidth (A
V
= +10)
3dB Bandwidth (A
V
= +20)
LSBW
3dB Bandwidth
GFP
Gain Flatness Peaking
GFR
Gain Flatness Rolloff
LPD
Linear Phase Deviation
Time Domain Response
TRS
Rise and Fall Time
TSS
Settling Time to 0.2%
OS
Overshoot
SR
Slew Rate
Distortion And Noise Response
HD2
2nd Harmonic Distortion
HD3
3rd Harmonic Distortion
IMD
3rd Order Intermod. Intercept
VN
Equivalent Input Noise Voltage
V
O
<
0.4V
PP
V
O
<
0.4V
PP
V
O
<
0.4V
PP
V
O
<
5.0V
PP
DC to 30MHz, V
O
<
0.4V
PP
DC to 30MHz, V
O
<
0.4V
PP
DC to 30MHz, V
O
<
0.4V
PP
1.8
420
90
35
0.4
0.2
0.8
1.3
GHz
MHz
70
30
0.5
0.5
1.5
dB
dB
Deg
0.4V step
2V step
0.4V step
2V step
4.0
18
5
300
4.7
30
10
250
ns
ns
%
V/μs
1V
PP
,10MHz
1V
PP
,10MHz
10MHz
1MHz to 100MHz
53
78
34
2.0
48
65
dBc
dBc
dBm
nV/
2.7
ICN
Equivalent Input Noise Current
1MHz to 100MHz
1.8
2.5
pA/
Static, DC Performance
AOL
Open-Loop Gain
VIO
Input Offset Voltage (Note 3)
DVIO
Offset Voltage Average Drift
IB
Input Bias Current (Note 3)
DIB
Bias Current Average Drift
IIO
Input Offset Current
DIIO
Offset Current Average Drift
PSRR
Power Supply Rejection Ratio
CMRR
Common Mode Rejection Ratio
ICC
Supply Current (Note 3)
DC
96
77
86
86
dB
μV
±
100
±
2
12
100
±
0.2
±
3
90
95
16
±
1000
8
40
250
3.4
±
50
80
84
18
±
800
20
2.0
85
88
17
±
1000
4
20
120
2.0
±
25
84
86
17
μV/C
μA
μA/C
μA
nA/C
dB
dB
mA
DC
DC
R
L
=
C
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