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參數(shù)資料
| 型號(hào)： | CLC5632IMX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | RF CONNECTOR; 50 OHM N MALE, CRIMP ATTACHMENT FOR RG59 & RG62; *WILL NOT MATE WITH 75 OHM N CONNECTORS* |
| 中文描述： | DUAL BUFFER AMPLIFIER, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁(yè)數(shù)： | 13/19頁(yè) |
| 文件大?。?/td> | 352K |
| 代理商： | CLC5632IMX |
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Application Division
(Continued)
AC Coupled Single Supply Operation
Figure 4 Figure 5 and Figure 6 show possible non-inverting
and inverting configurations for input signals that go below
0.8V DC.
The input is AC coupled to prevent the need for level shifting
the input signal at the source. The resistive voltage divider
biases the non-inverting input to V
CC
÷ 2 = 2.5V (For V
CC
=
+5V)
Dual Supply Operation
The CLC5632 operates on dual supplies as well as single
supplies. The non-inverting and inverting configurations are
shown in Figure 7 , and .
1
7
6
8
5
3
4
2
1k
+
-
+
-
1k
1k
1k
CLC5632
0.1
μ
F
6.8
μ
F
+
V
in
R
R
V
CC
V
CC
C
C
V
Low frequency cutoff
where Rg = 1k
.
V
2.5
1
2 R C
o
g
C
=
+
=
,
V
o
Note:
Channel 2 not shown.
DS015003-42
FIGURE 4. AC Coupled, A
V
= 1V/V Configuration
1
7
6
8
5
3
4
2
1k
+
-
+
-
1k
1k
1k
CLC5632
0.1
μ
F
6.8
μ
F
+
V
in
R
R
V
CC
V
CC
C
C
V
o
Note:
Channel 2 not shown.
V
Low frequency cutoff
V
2.5
1
2 R C
R
source
whereR
R
2
R
o
in
C
in
=
+
=
=
>>
π
,
DS015003-43
FIGURE 5. AC Coupled, A
V
= +1V/V Configuration
V
Low frequency cutoff
2V
2.5
1
2 R C
R
source
whereR
R
2
R
in
C
in
=
+
=
=
>>
π
,
1
7
6
8
5
3
4
2
1k
+
-
+
-
1k
1k
1k
CLC5632
0.1
μ
F
6.8
μ
F
+
V
in
R
R
V
CC
V
CC
C
C
V
o
Note:
Channel 2 not shown.
C
DS015003-44
FIGURE 6. AC Coupled, A
V
= +2V/V Configuration
1
7
6
8
5
3
4
2
1k
+
-
+
-
1k
1k
1k
CLC5632
V
o
0.1
μ
F
6.8
μ
F
+
V
in
R
t
V
CC
R
b
provides DC bias fo to
t
Note:
in
= R
t
||1k
.
Channel 2 not shown.
R
b
6.8
μ
F
0.1
μ
F
+
V
EE
DS015003-45
FIGURE 7. Dual Supply, A
V
= 1V/V Configuration
1
7
6
8
5
3
4
2
1k
+
-
+
-
1k
1k
1k
CLC5632
V
o
0.1
μ
F
6.8
μ
F
+
V
in
R
t
V
CC
Note:
Channel 2 not shown.
6.8
μ
F
0.1
μ
F
+
V
EE
DS015003-46
FIGURE 8. Dual Supply, A
V
= +1V/V Configuration
1
7
6
8
5
3
4
2
1k
+
-
+
-
1k
1k
1k
CLC5632
V
o
0.1
μ
F
6.8
μ
F
+
V
in
R
t
V
CC
Note:
Channel 2 not shown.
6.8
μ
F
0.1
μ
F
+
V
EE
DS015003-47
FIGURE 9. Dual Supply, A
V
= +2V/V Configuration
C
www.national.com
13
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC5632IN | Dual, High Output, Programmable Gain Buffer |
| CLC5633 | Triple, High Output, Programmable Gain Buffer |
| CLC5633IM | Triple, High Output, Programmable Gain Buffer |
| CLC5633IMX | Triple, High Output, Programmable Gain Buffer |
| CLC5633IN | Triple, High Output, Programmable Gain Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5632IN | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Dual, High Output, Programmable Gain Buffer |
| CLC5632M/N WAF | 制造商:Texas Instruments 功能描述: |
| CLC5632N WAF | 制造商:Texas Instruments 功能描述: |
| CLC5632N/M WAF | 制造商:Texas Instruments 功能描述: |
| CLC5633 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Triple, High Output, Programmable Gain Buffer |
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