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參數(shù)資料
| 型號(hào)： | CLC5623 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Triple, High Output, Video Amplifier |
| 中文描述： | 三，產(chǎn)量高，視頻放大器 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 182K |
| 代理商： | CLC5623 |
http://www.national.com
8
Feedback Resistor Selection
The feedback resistor, R
f
, affects the loop gain and
frequency response of a current feedback amplifier.
Optimum performance of the CLC5623, at a gain of
+2V/V, is achieved with R
f
equal to 750
for the SOIC
package and 1k
for the PDIP package. The frequency
response plots in the
Typical Performance
sections
illustrate the recommended R
f
for several gains.
recommended values of R
f
provide the maximum band-
width with minimal peaking.
adjusted to optimize the frequency response.
These
Within limits, R
f
can be
I
Decrease R
f
to peak frequency response and
extend bandwidth
I
Increase R
f
to roll off frequency response and
compress bandwidth
As a rule of thumb, if the recommended R
f
is doubled,
then the bandwidth will be cut in half.
Unity Gain Operation
The recommended R
f
for unity gain (+1V/V) operation
is 750
(for the PDIP package). R
g
is left open. Parasitic
capacitance at the inverting node may require a slight
increase in R
f
to maintain a flat frequency response.
Load Termination
The CLC5623 can source and sink near equal amounts
of current. For optimum performance, the load should be
tied to V
cm
.
Additional parasitics and limitations on decoupling in the
CLC5623IN combine to provide a lower level of performance
than the CLC5623IM. The specifications in the Electrical
Characteristics tables are based on the performance of
the DIP package (CLC5623IN).
mance, use the CLC5623IM (SOIC package).
supply decoupling and board layout are critical factors for
obtaining optimum performance of the CLC5623IN.
Board layout is less critical for the SOIC package. Use
the evaluation boards as a guide to proper layout.
For optimum perfor-
Proper
Figure 7 illustrates the frequency response versus output
amplitude for the CLC5623IM. Compare the
Frequency
Response vs. V
o
plot, in the
±5V Typical Performance
section, with Figure 7.Notice that gain flatness and band-
width improve when the SOIC package is used.
Figure 7: Frequency Response vs.V
o
Figure 8 illustrates the channel matching performance of
the surface mount version of the CLC5623. Once again,
the surface mount package performs better. If optimum
performance is desired, use the surface mount version of
the CLC5623.
Figure 8: Channel Matching Perfomance
Driving Cables and Capacitive Loads
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the CLC5623 will
improve stability and settling performance.
Frequency Response vs. C
L
plot, shown below in
Figure 9, gives the recommended series resistance value
for optimum flatness at various capacitive loads.
The
Figure 9: Frequency Response vs. C
L
Transmission Line Matching
One method for matching the characteristic impedance
(Z
o
) of a transmission line or cable is to place the
appropriate resistor at the input or output of the amplifier.
Figure 10 shows typical inverting and non-inverting circuit
configurations for matching transmission lines.
Non-inverting gain applications:
I
Connect R
g
directly to ground.
I
Make R
1
, R
2
, R
6
, and R
7
equal to Z
o
.
I
Use R
3
to isolate the amplifier from reactive
loading caused by the transmission line,
or by parasitics.
M
Frequency (Hz)
1M
10M
100M
V
o
= 1V
pp
C
L
= 10pF
R
s
= 68.1
C
L
= 17.4
R
s
C
L
= 6.7
R
s
C
L
1k
R
s
+
-
1k
1k
M
Frequency (Hz)
1M
10M
100M
V
o
= 1.5V
pp
V
o
= 1V
pp
V
o
= 0.1V
pp
V
o
= 2V
pp
V
o
= 2.5V
pp
A
v
= 2, R
f
=750
V
o
=
V
=
±
5V
SOIC Package
M
Frequency (Hz)
1M
10M
100M
Channel 1
Channel 2
Channel 3
A
v
= 2, R
f
=750
V
o
=
V
=
±
5V
SOIC Package
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC5623IMX | Triple, High Output, Video Amplifier |
| CLC5623IN | Triple, High Output, Video Amplifier |
| CLC5623IM | Triple, High Output, Video Amplifier |
| CLC5632 | Dual, High Output, Programmable Gain Buffer |
| CLC5632IM | Dual, High Output, Programmable Gain Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5623IM | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CLC5623IMX | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CLC5623IN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CLC5623M WAF | 制造商:Texas Instruments 功能描述: |
| CLC5632 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual, High Output, Programmable Gain Buffer |
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