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參數(shù)資料
| 型號： | CLC5622IN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Dual, High Output, Video Amplifier |
| 中文描述： | DUAL OP-AMP, 8000 uV OFFSET-MAX, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 180K |
| 代理商： | CLC5622IN |
http://www.national.com
8
Feedback Resistor Selection
The feedback resistor, R
f
, affects the loop gain and
frequency response of a current feedback amplifier.
Optimum performance of the CLC5622, at a gain of
+2V/V, is achieved with R
f
equal to 750
. The frequency
response plots in the
Typical Performance
sections
illustrate the recommended R
f
for several gains.
recommended values of R
f
provide the maximum band-
width with minimal peaking.
adjusted to optimize the frequency response.
These
Within limits, R
f
can be
I
Decrease R
f
to peak frequency response and
extend bandwidth
I
Increase R
f
to roll off frequency response and
compress bandwidth
As a rule of thumb, if the recommended R
f
is doubled,
then the bandwidth will be cut in half.
Unity Gain Operation
The recommended R
f
for unity gain (+1V/V) operation
is 1.2k
. R
g
is left open. Parasitic capacitance at the
inverting node may require a slight increase in R
f
to
maintain a flat frequency response.
Load Termination
The CLC5622 can source and sink near equal amounts
of current. For optimum performance, the load should be
tied to V
cm
.
Driving Cables and Capacitive Loads
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the CLC5622 will
improve stability and settling performance.
Frequency Response vs. C
L
plot, shown below in
Figure 7, gives the recommended series resistance value
for optimum flatness at various capacitive loads.
The
Figure 7: Frequency Response vs. C
L
Transmission Line Matching
One method for matching the characteristic impedance
(Z
o
) of a transmission line or cable is to place the
appropriate resistor at the input or output of the amplifier.
Figure 8 shows typical inverting and non-inverting circuit
configurations for matching transmission lines.
Non-inverting gain applications:
I
Connect R
g
directly to ground.
I
Make R
1
, R
2
, R
6
, and R
7
equal to Z
o
.
I
Use R
3
to isolate the amplifier from reactive
loading caused by the transmission line,
or by parasitics.
Figure 8:Transmission Line Matching
Inverting gain applications:
I
Connect R
3
directly to ground.
I
Make the resistors R
4
, R
6
, and R
7
equal to Z
o
.
I
Make R
5
II R
g
= Z
o
.
The input and output matching resistors attenuate the
signal by a factor of 2, therefore additional gain is needed.
Use C
6
to match the output transmission line over a
greater frequency range. C
6
compensates for the increase
of the amplifier’s output impedance with frequency.
Power Dissipation
Follow these steps to determine the power consumption
of the CLC5622:
1. Calculate the quiescent (no-load) power:
P
amp
= I
CC
(V
CC
- V
EE
)
2. Calculate the RMS power at the output stage:
P
o
= (V
CC
- V
load
) (I
load
), where V
load
and I
load
are the RMS voltage and current across the
external load.
3. Calculate the total RMS power:
P
t
= P
amp
+ P
o
The maximum power that the DIP and SOIC packages
can dissipate at a given temperature is illustrated in
Figure 9. The power derating curve for any CLC5622
package can be derived by utilizing the following
equation:
(175
°
θ
where
T
amb
= Ambient temperature (°C)
θ
JA
= Thermal resistance, from junction to ambient,
for a given package (°C/W)
+
-
R
3
Z
0
R
6
V
o
Z
0
R
1
R
2
+
R
g
Z
0
R
4
R
5
V
1
V
2
+
R
f
C
6
R
7
1/2
CLC5622
T
amb
JA
)
M
Frequency (Hz)
1M
10M
100M
V
o
= 1V
pp
C
L
R
s
= 10pF
C
L
= 17.4
R
s
C
L
= 1000pF
R
s
= 6.7
C
L
1k
R
s
+
-
1k
1k
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| CLC5623IN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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