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參數(shù)資料
| 型號： | CLC5523IMX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Low-Power, Variable Gain Amplifier |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 154K |
| 代理商： | CLC5523IMX |
7
http://www.national.com
Minimizing Parasitic Effects on
Small Signal Bandwidth
The best way to minimize parasitic effects is to use the
small outline package and surface mount components.
For designs utilizing through-hole components,
specifically axial resistors, resistor self-capacitance
should be considered. Example: the average magnitude
of parasitic capacitance of RN55D 1% metal film
resistors is about 0.15pF with variations of as much as
0.1pF between lots.
Given the CLC5523’s extended
bandwidth, these small parasitic reactance variations can
cause measurable frequency response variations in the
highest octave. We therefore recommend the use
of surface mount resistors to minimize these parasitic
reactance effects. If an axial component is preferred, we
recommend PRP8351 resistors which are available from
Precision Resistive Products, Inc., Highway 61 South,
Mediapolis, Iowa.
Small Signal Response at Low A
vmax
When the maximum gain, as set by R
g
and R
f
, is greater
than or equal to A
vmax
= 10, little or no peaking should be
observed in the amplifier response. When the gain range
is set to less than A
vmax
= 10, some peaking may
be observed at higher frequencies. At gain ranges of
2
2
A
vmax
2
10 peaking can be minimized by increasing
R
f
.
At gain ranges of A
vmax
< 2 peaking reaches
approximately 6dB in the upper octave.
If peaking is observed with the recommended R
f
resistor,
and a small increase in the R
f
resistor does not solve the
problem, then investigate the possible causes and
remedies listed below.
I
Capacitance across R
f
I
Do not place a capacitor across R
f
I
Keep traces connecting R
f
separated and as
short as possible
I
Capacitive Loads
I
Place a small resistor (20-50
W
) between the
output and C
L
I
Long traces and/or lead lengths between R
f
and the CLC5523
I
Keep these traces as short as possible
I
Long traces between CLC5523 and 0.1
m
F
bypass capacitors
I
Keep these traces less than 0.2 inches (5mm)
I
For the devices in the PDIP package, an
additional 1000pF monolithic capacitor should be
placed less than 0.1” (3mm) from the pin
I
Extra capacitance between the R
g
pin and
ground (C
G
)
I
See the Printed Circuit Board Layout sub-section
below for suggestions on reducing C
G
I
Increase R
f
if peaking is still observed after
reducing C
G
I
Non-inverting input pin connected directly to
ground
I
Place a 50 to 200
W
resistor between the non-
inverting pin and ground
Adjusting Offsets and DC Level Shifting
Offsets can be broken into two parts: an input-referred term
and an output-referred term. These errors can be trimmed
using the circuit in Figure 4. First set V
G
to 0V and adjust
the trim pot R4 to null the offset voltage at the output. This
will eliminate the output stage offsets. Next set V
G
to 2V
and adjust the trim pot R1 to null the offset voltage at the
output. This will eliminate the input stage offsets.
Figure 4: Offset Adjust Circuit
CLC5523
R
f
2
3
4
1
V
G
6
7
25
W
R
g
R3
10k
0.1
m
F
R4
10k
-5V
+5V
V
o
V
in
R2
10k
0.1
m
F
R1
10k
-5V
+5V
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC5523IN | Low-Power, Variable Gain Amplifier |
| CLC5523IM | Low-Power, Variable Gain Amplifier |
| CLC5526PCASM | Digital Variable Gain Amplifier (DVGA) |
| CLC5526 | Digital Variable Gain Amplifier (DVGA) |
| CLC5526MSA | Digital Variable Gain Amplifier (DVGA) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5523IN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CLC5526 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Digital Variable Gain Amplifier (DVGA) |
| CLC5526MSA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Digital Variable Gain Amplifier (DVGA) |
| CLC5526MSA/NOPB | 功能描述:IC VARIABLE GAIN AMP DGTL 20SSOP RoHS:是 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:1,000 系列:- 放大器類型:電壓反饋 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:33 V/µs 增益帶寬積:20MHz -3db帶寬:30MHz 電流 - 輸入偏壓:2nA 電壓 - 輸入偏移:3000µV 電流 - 電源:2.5mA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 16.5 V，±2.25 V ~ 8.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:帶卷 (TR) |
| CLC5526MSAX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Differential Amplifier |
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