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參數(shù)資料
| 型號： | CLC5523I |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Low-Power, Variable Gain Amplifier |
| 中文描述： | 低功耗，可變增益放大器 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 154K |
| 代理商： | CLC5523I |
http://www.national.com
8
Evaluation Boards
Evaluation boards are available for both the 8-pin DIP
and small outline package types.
contain an evaluation board and CLC5523 samples can
be obtained by calling National Semiconductor’s
Customer Service Center at 1-800-272-9959. The 8-pin
DIP evaluation kit part number is CLC730065. The 8-pin
small outline evaluation kit part number is CLC730066.
Evaluation kits that
The DIP evaluation kit has been designed to utilize axial
lead components. The small outline evaluation kit has
been designed to utilize surface mount components.
The circuit diagram shown in Figure 5, applies to both the
DIP and the small outline evaluation boards.
Gain
Control
RX
50
W
+
-
V
in
R
g
GND
V
G
I-
V
o
-V
CC
+V
CC
R
in
50
W
Input
Signal
R
g
100
W
0.1
m
F
6.8
m
F
R
f
1k
W
R
o
50
W
0.1
m
F
6.8
m
F
-5V
5V
Output
X1
*
25
W
* 25
W
series resistor is not required on the
small outline device and does not appear on
the small outline board
Figure 5: Evaluation Board Schematic
Printed Circuit Board Layout
High frequency op amp performance is strongly
dependent on proper layout, proper resistive termination
and adequate power supply decoupling. The most impor-
tant layout points to follow are:
I
Use a ground plane
I
Bypass each power supply pin with these capacitors:
I
a high-quality 0.1
m
F ceramic capacitor placed
less than 0.2” (5mm) from the pin
I
a 6.8
m
F tantalum capacitor less than 2” (50mm)
from the pin
I
for the plastic DIP package, a high-quality
1000pF ceramic capacitor placed less than 0.1”
(3mm) from the pin
Capacitively bypassing power pins to a good ground plane
with a minimum of trace length (inductance) is necessary
for any high speed device, but it is particularly important for
the CLC5523.
I
Establish wide, low impedance, power supply traces
I
For the plastic DIP package, a 25
W
resistor should
be connected from pin 4 to ground with a minimum
length trace
I
Minimize or eliminate sources of capacitance
between the R
f
pin and the output pin. Avoid
adjacent feedthrough vias between the R
f
and
output leads since such a geometry may give rise
to a significant source of capacitance.
I
Minimize trace and lead lengths for components
between the inverting and output pins
I
Remove ground plane 0.1” (3mm) from all
input/output pads
I
For prototyping, use flush-mount printed circuit
board pins; never use high profile DIP sockets
To minimize high frequency distortion, other layout issues
need be addressed:
I
Short, equal length, low impedance power supply
return paths from the load to the supplies
I
avoid returning output ground currents near the
input stage.
相關(guān)PDF資料 |
PDF描述 |
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| CLC5523IMX | Low-Power, Variable Gain Amplifier |
| CLC5523IN | Low-Power, Variable Gain Amplifier |
| CLC5523IM | Low-Power, Variable Gain Amplifier |
| CLC5526PCASM | Digital Variable Gain Amplifier (DVGA) |
| CLC5526 | Digital Variable Gain Amplifier (DVGA) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC5523IM | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low-Power, Variable Gain Amplifier |
| CLC5523IMX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low-Power, Variable Gain Amplifier |
| CLC5523IN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CLC5526 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Digital Variable Gain Amplifier (DVGA) |
| CLC5526MSA | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Digital Variable Gain Amplifier (DVGA) |
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